System and method for IQ mismatch calibration and compensation

    公开(公告)号:US12028821B2

    公开(公告)日:2024-07-02

    申请号:US17478622

    申请日:2021-09-17

    CPC classification number: H04W56/004 H03D3/009 H04L27/364 H03D2200/0045

    Abstract: A method for providing IQ mismatch (IQMM) compensation includes: estimating an overall frequency response of a compensation filter by stepping through a frequency range starting at an initial frequency and performing (1) through (3) at each step, a selected frequency at each step being a multiple of a subcarrier frequency of the initial frequency: (1) sending a single tone signal at the selected frequency, (2) determining a first response of a mismatched signal at the selected frequency and a second response of the mismatched signal at an image frequency of the selected frequency, and (3) estimating a frequency response of the compensation filter at the selected frequency based on the first response and the second response; generating time-domain filter taps based on the estimated overall frequency response of the compensation filter; determining a time delay based on the time-domain filter taps; and generating a compensated signal based on the time delay.

    TRANSMITTER COMPLEX- AND REAL-VALUED IN-PHASE AND QUADRATURE MISMATCH PRE-COMPENSATORS

    公开(公告)号:US20210359895A1

    公开(公告)日:2021-11-18

    申请号:US17070912

    申请日:2020-10-14

    Abstract: An in-phase and quadrature mismatch compensator for a quadrature transmitter includes a delay element, a complex-valued filter and an adder. The delay element receives an input transmit signal and outputs a delayed transmit signal. The complex-valued filter receives the input transmit signal and outputs a selected part of a filtered output transmit signal. The adder adds the delayed transmit signal and the selected part of the filtered output transmit signal and outputs a pre-compensated transmit signal. In one embodiment, the selected part of the filtered output transmit signal includes the real part of the complex-valued output transmit signal. In another embodiment, the selected part of the filtered output transmit signal includes the imaginary part of the complex-valued output transmit signal. Two transmit real-valued compensators are also disclosed that combine the in-phase and quadrature signals before being filtered.

    SYSTEM AND METHOD FOR DETECTING PROXIMITY OF USERS

    公开(公告)号:US20210239819A1

    公开(公告)日:2021-08-05

    申请号:US16920289

    申请日:2020-07-02

    Abstract: A system and method for detecting proximity of a user within a particular distance of a radio device is disclosed. The method includes transmitting a signal via a transmitter and antenna of the radio device, receiving a received signal via a receiver and the antenna, processing the received signal for distinguishing a signal reflected from the user from a leaked portion of the transmitted signal, and reducing power of the radio device in response to the processing.

    Efficient polyphase architecture for interpolator and decimator

    公开(公告)号:US09966977B1

    公开(公告)日:2018-05-08

    申请号:US15402651

    申请日:2017-01-10

    CPC classification number: H04B1/0042 H04B1/0046 H04B3/462

    Abstract: Apparatuses (and methods of manufacturing same), systems, and methods concerning polyphase digital filters are described. In one aspect, an apparatus is provided, including at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients. In one aspect, the apparatus is a polyphase finite impulse response (FIR) digital filter, including an interpolator and a decimator, where each of the interpolator and the decimator have at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients.

    Distributed closed-loop power control with VGA gain update

    公开(公告)号:US11870512B2

    公开(公告)日:2024-01-09

    申请号:US17731251

    申请日:2022-04-27

    CPC classification number: H04B7/04 H03F3/245 H04B2001/0416

    Abstract: A closed-loop power control (CLPC) system is disclosed that includes a first signal path for a first polarization and a second signal path for a second polarization. The first signal path includes a first power amplifier, a first output power detector configured to detect a first output power level of the first power amplifier, and a first processor configured to determine a first analog gain for a first controller and a first gain for a first digital-to-analog converter based on a first accumulated error between the first output power level and a target Effective Isotropically Radiated Power. A second processor is configured to set a first variable gain of a first variable gain amplifier coupled to an input of the first power amplifier. The CLPC can be configured to control the gain of the first signal path separately or as one signal path.

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