Abstract:
An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications, configured to replace conventional analog RF down and up conversion circuitry. The ADDA RF transceiver includes one of more ADCs, DSPs, and DACs, all on a single ASIC. Further, the circuitry is to be radiation tolerant for high availability and reliability in the ionizing radiation environment present in the space environment.
Abstract:
A heterodyne receiver structure comprises a frequency conversion block arranged to convert an incoming analog radio frequency (RF) signal to an analog intermediate frequency (IF) signal; a filter block arranged to filter said analog IF signal; and an analog-to-digital (AD) converter block arranged to convert said filtered analog IF signal to a digital signal, wherein the AD converter block (309) is arranged to convert the filtered analog IF signal to the digital signal by using a sampling frequency (fs) which is at least N times a maximum bandwidth of the filtered analog IF signal, wherein the frequency spectrum from zero to the sampling frequency is divided into N frequency zones of equal width, wherein N is an even positive number higher than two; the frequency conversion block (304) is arranged to convert the incoming analog RF signal to the analog IF signal such that the analog IF signal is located in any of the N/2-1 frequency zones having lowest frequency; and the filter block (306-308) is arranged to low pass the analog IF signal such that any disturbing signal located in a zone, which would have a mirror image after the AD conversion in the zone, in which the analog IF signal is located, is filtered away, wherein the heterodyne receiver structure further comprises a digital signal processing block (311) arranged to filter said digital signal.
Abstract:
A receiver comprising: one or more variable gain elements; an automatic gain control (AGC) for controlling a gain of one or more of the one or more the variable gain elements; and a frame detector configured to detect the presence of a frame in a signal received by the receiver and to output a signal to the AGC on detection of a data frame, wherein the AGC is configured to estimate a signal to noise ratio (SNR) of the received signal on receiving an input signal from the frame detector, to calculate a SNR margin between the estimated SNR and a target SNR and to adjust the gain of one or more of the one or more variable gain elements to maintain a positive SNR margin such that in the event of interference with the received signal the one or more variable gain elements do not saturate.
Abstract:
A method and circuit for signal processing in a receiver that can be tuned to different carriers, the method determining the energy of the adjacent carriers N+1 and N−1, wherein a carrier N contains a signal of interest and the receiver is tuned to it, from the digital signal, in that the energy value of the carriers N+1 and N−1 determined are compared with a threshold value, and in the case where the threshold value is exceeded, a frequency shift of the signal by +Δf or −Δf is effected in the second method step prior to the filtering, and the frequency shift thus produced is reversed by a frequency shift by −Δf or +Δf prior to the filtering, and the signal is decoded.
Abstract:
A wideband receiver circuit is disclosed that includes a signal input configured to receive a spectrum signal of bandwidth B that contains an RF signal and an interference signal. A down conversion module is connected to the signal input and has N down conversion channels, wherein each of the N down conversion channels is configured to down convert the spectrum signal to one of N decimated baseband signals by processing the spectrum signal with one distinct phase of a sequence of length N and period N/fclk=N/2B to generate a baseband output signal. An amplifier circuit is connected to each of the N down conversion channels, and is configured to amplify the baseband output signal. A digital signal processing module including an analog to digital conversion circuit is connected to each amplifier circuit and is configured to convert the amplified baseband output signal to N digital signals. The digital signal processing module also having a digital reconstruction processor to combine each of the N digital signals and generate a reconstructed RF signal.
Abstract:
A demodulator 100 includes: an AD conversion section 10 that converts a received signal RF in an analogue form to a digital signal; a noise removal section 40 that is connected to a back side of the AD conversion section 10 to detect and remove a noise from an input signal; decimation filters 52 and 54 that are connected to a back side of the noise removal section 40 and reduce a data rate of an input signal; and a demodulation section 60 that is connected to back sides of the decimation filters 52 and 54 and demodulates an input signal. The decimation filters 52 and 54 are connected to the back side of the noise removal section 40, which provides a demodulator less subject to degradation of a signal wave.
Abstract:
Embodiments of the present invention may provide a receiver. The receiver may include an RF section, a local oscillation signal generator to generate quadrature local oscillation signals, and a quadrature mixture, coupled to the RF section, to downconvert a first group of wireless signals directly to baseband frequency quadrature signals and to downconvert a second group of wireless signals to intermediate frequency quadrature signals. The receiver may also include a pair of analog-to-digital converters (ADCs) to convert the downconverted quadrature signals to corresponding digital quadrature signals. Further, the receiver may include a digital section having two paths to perform signal processing on the digital baseband frequency quadrature signals and to downconvert the digital intermediate frequency signals to baseband cancelling a third order harmonic distortion therein. Moreover, the receiver may include a phase corrector to adjust a phase of one of the local oscillation signals to balance the third order harmonic distortion and a gain offset generator to adjust a gain of one of the downconverted signals to balance the third order harmonic distortion.
Abstract:
An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications, configured to replace conventional analog RF down and up conversion circuitry. The ADDA RF transceiver includes one of more ADCs, DSPs, and DACs, all on a single ASIC. Further, the circuitry is to be radiation tolerant for high availability and reliability in the ionizing radiation environment present in the space environment.
Abstract:
Clipping a widely-separated, multi-carrier signal is effectively performed without having to use a high sampling speed. Clipping is performed in a first stage at a combined signal level, but with a predetermined carrier separation of at least twice the channel bandwidth (2CBW), followed by repositioning the carriers at baseband zero frequency. After clipping, carriers are placed at their respective center frequencies with full carrier separation reintroduced in a second stage. Iterative clipping stages smooth out signal reshaping and re-settled amplitudes for combined carriers.
Abstract:
A method may include: determining a signal strength of a signal in a receive path of a wireless communication element, the receive path configured to receive a wireless communication signal and convert the wireless communication signal into a digital signal based at least on an oscillator signal; selecting a current mode from at least one of a first current mode and a second current mode for the wireless communication element based at least on the signal strength; communicating a control signal to the receive path indicative of the current mode; modifying one or more operational parameters of the receive path such that the receive path consumes a different amount of current in each of the current modes.