METHOD FOR DEMODULATING A RF SIGNAL
    1.
    发明公开

    公开(公告)号:US20240214010A1

    公开(公告)日:2024-06-27

    申请号:US18392372

    申请日:2023-12-21

    IPC分类号: H04B1/00 H04B1/16

    摘要: The present disclosure relates to a method for demodulating a RF signal comprising the steps of: detecting if an analog to digital converter (ADC) of a Near Zero Intermediate Frequency (NZIF) receiver is in a clipping state; and if yes: determining and storing a first value (RSSI1) representative of the energy of a received signal demodulated by the Near Zero Intermediate Frequency (NZIF) receiver using a first intermediate frequency (IF1); determining and storing a second value (RSSI2) representative of the energy of the received signal demodulated by the Near Zero Intermediate Frequency (NZIF) receiver using a second intermediate frequency (IF2) corresponding to the opposite value of the first intermediate frequency (IF1), selecting the intermediate frequency corresponding to the lowest value of said first and second values.

    METHOD FOR RAPID BASELINE RECOVERY FOR IRREGULAR FREQUENCY CONTENT LARGE DYNAMIC RANGE UNIPOLAR DATA SIGNALS

    公开(公告)号:US20240039563A1

    公开(公告)日:2024-02-01

    申请号:US17815164

    申请日:2022-07-26

    IPC分类号: H04B1/00 H04B1/16

    CPC分类号: H04B1/001 H04B1/0014 H04B1/16

    摘要: Techniques to dynamically adjust the corner frequency of a high-pass filter in response to a time-domain amplitude value of an output signal, thereby preserving accuracy while promptly recovering the signal's baseline value. A system can be configured to filter frequency-domain values of an input signal based on a filtering characteristic. The filtering characteristic can be set dynamically in response to a time-domain value of an amplitude of an output signal. The filtering characteristic can comprise a corner frequency, and the system can include a high-pass filter configured to filter out frequency components at frequencies lower than the corner frequency. The system is configured to dynamically change the corner frequency from a first value to a second value, in response to the time-domain value of the amplitude crossing a threshold value. The system may dynamically change the corner frequency within a time interval after the crossing.

    QUADRATURE CHIRP GENERATION
    3.
    发明公开

    公开(公告)号:US20230299796A1

    公开(公告)日:2023-09-21

    申请号:US17695868

    申请日:2022-03-16

    申请人: Intel Corporation

    IPC分类号: H04B1/00 H04B1/04

    摘要: A system may include a digital front end (DFE). The DFE may be configured to generate a command signal. The system may also include a sweeper. The sweeper may be configured to generate an intermediate in-phase signal, an intermediate quadrature signal, and a LO signal based on the command signal. In addition, the system may include a mixer. The mixer may be configured to generate a mixed in-phase signal based on the intermediate in-phase signal and the LO signal. The mixer may also be configured to generate a mixed quadrature signal based on the intermediate quadrature signal and the LO signal. Further, the system may include an amplifier. The amplifier may be configured to generate an in-phase signal based on the mixed in-phase signal and an amplification setting. The amplifier may also be configured to generate a quadrature signal based on the mixed quadrature signal and the amplification setting.

    Electromagnetic wave transmission device and electromagnetic wave communication system

    公开(公告)号:US11750229B2

    公开(公告)日:2023-09-05

    申请号:US17605984

    申请日:2020-03-31

    发明人: Hideki Kobayashi

    摘要: An electromagnetic wave transmission device according to the present invention includes: a transmission unit that has, in voltage-current characteristics, a local maximum value and a local minimum value located on a higher voltage side than the local maximum value and transmits an electromagnetic wave indicating a modulation signal; and a modulation unit which modulates an acquired digital signal to the modulation signal using first voltage values of two or more levels in a first voltage region, which is equal to or greater than a voltage of the local maximum value and is equal to or less than a voltage of the local minimum value, and a second voltage value in a second voltage region, which is less than the voltage of the local maximum value, and a third voltage value in a third voltage region, which is on a higher voltage side than the voltage of the local minimum value. A first signal which transits to any one voltage value of the first voltage values from any voltage value in the first voltage region via the second voltage value and a second signal which transits to the any one voltage value from the any voltage value via the third voltage value are the same signals. The modulation unit selects, out of the first signal and the second signal, the signal having a smaller total transition potential difference.

    Analog modulated repeater/transceiver

    公开(公告)号:US10014884B1

    公开(公告)日:2018-07-03

    申请号:US15694228

    申请日:2017-09-01

    摘要: An analog transceiver having low latency for processing a received RF/MW signal and modifying the received RF/MW signal into a modified RF/MW signal prior to transmission of the modified RF/MW signal. The analog transceiver comprises a receiving antenna; a direct conversion receiver, coupled with the receiving antenna, for splitting the received RF/MW signal into an in-phase portion and a quadrature portion; an analog signal processing device, having a plurality of actuatable switches, for modifying the in-phase and quadrature portions and outputting modified signals while only introducing minimal latency during processing; a direct conversion transmitter, for receiving the suitably modified in-phase and quadrature portions and forming the modified RF/MW signal; and a transmitting antenna for receiving the modified RF/MW signal and transmitting the modified RF/MW signal.

    Digital-to-analog converter system and method

    公开(公告)号:US09906236B2

    公开(公告)日:2018-02-27

    申请号:US15230965

    申请日:2016-08-08

    摘要: An Interleaved Radio Frequency Digital-to-Analog Converter (RF DAC) suitable for use in cellular base stations and optimized to give both a wide RF tuning range and a wide RF bandwidth is disclosed. The RF DAC uses two levels of interleaving, the first providing a direct conversion path from Base Band (BB) to RF, and the second providing a variable interleaving factor through the use of summation to optimize the output bandwidth as a function of the RF center frequency. Digital Interpolation, including an arbitrary sample rate conversion filter, allows the RF DAC to operate from a wide range of possible BB sample rates and the DAC sample rate is a fixed ratio of the RF center frequency. As a result, the spurious outputs from the RF DAC are in known locations that are relatively easy to filter out, minimizing the frequency planning tasks required for a complete RF system design.

    Resolution programmable SAR ADC
    7.
    发明授权

    公开(公告)号:US09906232B1

    公开(公告)日:2018-02-27

    申请号:US15455915

    申请日:2017-03-10

    申请人: Xilinx, Inc.

    摘要: An example successive approximation (SAR) analog-to-digital converter (ADC) includes: a track-and-hold (T/H) circuit configured to receive an analog input signal; a digital-to-analog converter (DAC); an adder having inputs coupled to outputs of the T/H circuit and the DAC; a comparison circuit coupled to an output of the adder and configured to perform a comparison operation; and a control circuit, coupled to an output of the comparison circuit, configured to: receive a selected resolution; gate the comparison operation of the comparison circuit based on the selected resolution; and generate a digital output signal having the selected resolution.

    Digital RF receiver power saving with signal quality dependent word length reduction

    公开(公告)号:US09735812B2

    公开(公告)日:2017-08-15

    申请号:US14751793

    申请日:2015-06-26

    IPC分类号: H04B1/04 H04B1/00 H04W52/02

    摘要: A radio frequency (RF) transceiver system comprises an input port configured to receive an RF receive signal and a receiver (RX) digital signal processing (DSP) unit configured to process a digital IF signal based on the RF receive signal and generate a processed digital IF signal at an output port based thereon. Further, the RF transceiver system comprises a digital interface unit comprising a digital interface configured to convey the processed digital IF signal from the output port. In addition, the RF transceiver system comprises a quality estimation unit configured to estimate a quality indicator of the RF receive signal or a signal associated therewith, and dynamically adapt a digital transmission word length of the processed digital IF signal over the digital interface, based on the estimated quality indicator.

    RECEIVING CIRCUIT, RECEIVING DEVICE INCLUDING THE SAME, AND RECEIVING METHOD

    公开(公告)号:US20170135037A1

    公开(公告)日:2017-05-11

    申请号:US15345668

    申请日:2016-11-08

    发明人: Hideaki Shiozawa

    IPC分类号: H04W52/02 H04B1/16 H04B1/00

    摘要: A receiving circuit includes a receiver configured to receive a signal, a detector configured to detect arrival of a reception signal based on a signal received by the receiver, a buffer configured to store therein data corresponding to the reception signal, a demodulation processor configured to demodulate data to be supplied, and a controller configured to store the data corresponding to the reception signal in the buffer when the detector does not detect the arrival of the reception signal, and to supply the data stored in the buffer to the demodulation processor when the detector detects the arrival of the reception signal.