公开(公告)号：US10396742B2

公开(公告)日：2019-08-27

申请号：US16111555

申请日：2018-08-24

Applicant: JVC KENWOOD CORPORATION

Inventor： Hideaki Shiozawa

IPC: H04B1/10 ,  H04B17/00 ,  H03G3/34 ,  H03F3/183 ,  H03G3/30

Abstract: A noise squelch processor generates a noise squelch determination signal by comparing a noise level and a threshold value with each other. A carrier detector generates a carrier determination signal indicating whether or not a reception signal is present based on a signal strength of the reception signal. An integrator controller controls an integrator to set a cutoff frequency of the integrator to a second cutoff frequency higher than a first cutoff frequency at a first timing when the carrier detector generates a carrier determination signal indicating that the reception signal is present, and to switch the cutoff frequency of the integrator from the second cutoff frequency to the first cutoff frequency at a second timing after an elapse of a predetermined period from the first timing.

公开(公告)号：US09967826B2

公开(公告)日：2018-05-08

申请号：US15345668

申请日：2016-11-08

Applicant: JVC KENWOOD Corporation

Inventor： Hideaki Shiozawa

IPC: H03K9/00 ,  H04W52/02 ,  H04B1/00 ,  H04B1/16

CPC classification number: H04W52/029 ,  H04B1/0014 ,  H04B1/0017 ,  H04B1/16 ,  Y02D70/00

Abstract: A receiving circuit includes a receiver configured to receive a signal, a detector configured to detect arrival of a reception signal based on a signal received by the receiver, a buffer configured to store therein data corresponding to the reception signal, a demodulation processor configured to demodulate data to be supplied, and a controller configured to store the data corresponding to the reception signal in the buffer when the detector does not detect the arrival of the reception signal, and to supply the data stored in the buffer to the demodulation processor when the detector detects the arrival of the reception signal.

公开(公告)号：US20170135037A1

公开(公告)日：2017-05-11

申请号：US15345668

申请日：2016-11-08

Applicant: JVC KENWOOD Corporation

Inventor： Hideaki Shiozawa

IPC: H04W52/02 ,  H04B1/16 ,  H04B1/00

CPC classification number: H04W52/029 ,  H04B1/0014 ,  H04B1/0017 ,  H04B1/16 ,  Y02D70/00

Abstract: A receiving circuit includes a receiver configured to receive a signal, a detector configured to detect arrival of a reception signal based on a signal received by the receiver, a buffer configured to store therein data corresponding to the reception signal, a demodulation processor configured to demodulate data to be supplied, and a controller configured to store the data corresponding to the reception signal in the buffer when the detector does not detect the arrival of the reception signal, and to supply the data stored in the buffer to the demodulation processor when the detector detects the arrival of the reception signal.