公开(公告)号：US12068323B2

公开(公告)日：2024-08-20

申请号：US17511923

申请日：2021-10-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Deok Han Bae ,  Ju Hun Park ,  Myung Yoon Um ,  Ye Ji Lee ,  Yoon Young Jung

IPC: H01L27/092 ,  H01L23/528 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L27/0924 ,  H01L23/528 ,  H01L29/0665 ,  H01L29/41791 ,  H01L29/42392 ,  H01L29/78696

Abstract: A semiconductor device includes a substrate having a first power supply region, a second power supply region, and a cell region therein. The cell region extends between the first power supply region and the second power supply region. A first active region and a second active region are provided, which extend side-by-side within the cell region. A first power supply wiring is provided, which extends in the first direction within the first power supply region. A first source/drain contact is provided, which connects the first active region and the second active region. A second source/drain contact is provided, which connects the first active region and the first power supply wiring. The first source/drain contact includes a first recess portion disposed inside an intermediate region between the first active region and the second active region.

公开(公告)号：US11705497B2

公开(公告)日：2023-07-18

申请号：US17185466

申请日：2021-02-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： In Yeal Lee ,  Yoon Young Jung ,  Jin-Wook Kim ,  Deok Han Bae ,  Myung Yoon Um

IPC: H01L29/423 ,  H01L29/786 ,  H01L29/06 ,  H01L29/51

CPC classification number: H01L29/42392 ,  H01L29/0673 ,  H01L29/512 ,  H01L29/78696

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an active pattern extending in a first direction on the substrate, a gate electrode extending in a second direction intersecting the first direction on the active pattern, a gate spacer extending in the second direction along side walls of the gate electrode, an interlayer insulating layer contacting side walls of the gate spacer, a trench formed on the gate electrode in the interlayer insulating layer, a first capping pattern provided along side walls of the trench, at least one side wall of the first capping pattern having an inclined profile, and a second capping pattern provided on the first capping pattern in the trench.

公开(公告)号：US10475707B2

公开(公告)日：2019-11-12

申请号：US15292790

申请日：2016-10-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gi Gwan Park ,  Jung Gun You ,  Ki II Kim ,  Sug Hyun Sung ,  Myung Yoon Um

IPC: H01L21/8238 ,  H01L21/762 ,  H01L29/66 ,  H01L27/092 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/165

Abstract: A method of manufacturing a semiconductor device includes forming a first fin-type pattern and a second fin-type pattern which are separated by a first trench between facing ends thereof, forming a first insulating layer filling the first trench, removing a portion of the first insulating layer to form a second trench on the first insulating layer, and forming a third trench by enlarging a width of the second trench.

公开(公告)号：US12009397B2

公开(公告)日：2024-06-11

申请号：US17539772

申请日：2021-12-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Deok Han Bae ,  Ju Hun Park ,  Myung Yoon Um

IPC: H01L29/417 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786

CPC classification number: H01L29/41775 ,  H01L27/0924 ,  H01L29/0665 ,  H01L29/41733 ,  H01L29/41791 ,  H01L29/42392 ,  H01L29/7851 ,  H01L29/786

Abstract: A semiconductor device including a field insulating layer, a part of which protrudes upwardly in a vertical direction on an element isolation region between a first active region and a second active region may be provided.

公开(公告)号：US11575014B2

公开(公告)日：2023-02-07

申请号：US17227848

申请日：2021-04-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Deok Han Bae ,  Sung Min Kim ,  Ju Hun Park ,  Myung Yoon Um ,  Jong Mil Youn

IPC: H01L29/417 ,  H01L29/40 ,  H01L29/06 ,  H01L29/66

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate comprising an element isolation region and an active region defined by the element isolation region, a fin-type pattern on the active region, the fin-type pattern extending in a first horizontal direction, a gate electrode on the fin-type pattern, the gate electrode extending in a second horizontal direction that crosses the first horizontal direction, a capping pattern on the gate electrode, a source/drain region on at least one side of the gate electrode, a source/drain contact on the source/drain region and electrically connected to the source/drain region, and a filling insulating layer on the source/drain contact, the filling insulating layer having a top surface at a same level as a top surface of the capping pattern, and including a material containing a carbon (C) atom.

公开(公告)号：US10910275B2

公开(公告)日：2021-02-02

申请号：US16599313

申请日：2019-10-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gi Gwan Park ,  Jung Gun You ,  Ki Il Kim ,  Sug Hyun Sung ,  Myung Yoon Um

IPC: H01L21/8238 ,  H01L29/66 ,  H01L27/092 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/165

Abstract: A method of manufacturing a semiconductor device includes forming a first fin-type pattern and a second fin-type pattern which are separated by a first trench between facing ends thereof, forming a first insulating layer filling the first trench, removing a portion of the first insulating layer to form a second trench on the first insulating layer, and forming a third trench by enlarging a width of the second trench.

公开(公告)号：US20250140694A1

公开(公告)日：2025-05-01

申请号：US18813438

申请日：2024-08-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ki-Il Kim ,  Sug Hyun Sung ,  Myung Yoon Um ,  Jung Gun You

IPC: H01L23/528 ,  H01L21/768 ,  H01L21/8234 ,  H01L23/522 ,  H01L27/088 ,  H01L29/06 ,  H01L29/08

Abstract: A semiconductor device includes a back interlayer insulating film, a back wiring line disposed within the back interlayer insulating film, a fin-type pattern disposed on a first surface of the back wiring line, a source/drain pattern disposed on the fin-type pattern, and a back wiring contact connecting the back wiring line and source/drain pattern. A bottom surface of the source/drain pattern is connected to the fin-type pattern and faces the back wiring line. The back wiring contact includes a back contact barrier film, a back contact plug film, and a back ferroelectric material film. The back wiring contact includes a third surface facing the back wiring line. A vertical length from a second surface of the back wiring line to the third surface of the back wiring contact is less than a vertical length from the second surface to the bottom surface of the source/drain pattern.

公开(公告)号：US12224315B2

公开(公告)日：2025-02-11

申请号：US17516900

申请日：2021-11-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ju Hun Park ,  Won Cheol Jeong ,  Jin Wook Kim ,  Deok Han Bae ,  Myung Yoon Um ,  In Yeal Lee ,  Yoon Young Jung

IPC: H01L29/06 ,  H01L29/66

Abstract: A semiconductor device includes an active pattern extending in a first direction on a substrate, a gate structure on the active pattern and having a gate electrode extending in a second direction intersecting the active pattern, and a gate capping pattern on the gate electrode, the gate capping pattern including a gate capping liner defining a gate capping recess, the gate capping liner having a horizontal portion along an upper surface of the gate electrode, and a vertical portion extending from the horizontal portion in a third direction intersecting the first and second directions, and a gate capping filling film on the gate capping liner and filling the gate capping recess, an epitaxial pattern on the active pattern and adjacent the gate structure, a gate contact on and connected to the gate electrode, and an active contact on and connected to the epitaxial pattern.

公开(公告)号：US11626501B2

公开(公告)日：2023-04-11

申请号：US17039083

申请日：2020-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： In Yeal Lee ,  Ju Youn Kim ,  Jin-Wook Kim ,  Ju Hun Park ,  Deok Han Bae ,  Myung Yoon Um

IPC: H01L29/423 ,  H01L23/528 ,  H01L21/84 ,  H01L27/088 ,  H01L27/108 ,  H01L29/49 ,  H01L23/522 ,  H01L21/02

Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, and a gate contact in the gate structure. The gate structure includes a gate electrode extending in a first direction and a gate capping pattern on the gate electrode. The gate contact is connected to the gate electrode. The gate electrode includes a protrusion extending along a boundary between the gate contact and the gate capping pattern.

公开(公告)号：US11296029B2

公开(公告)日：2022-04-05

申请号：US17007265

申请日：2020-08-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ju Youn Kim ,  Deok Han Bae ,  Jin-Wook Kim ,  Ju Hun Park ,  Myung Yoon Um ,  In Yeal Lee

IPC: H01L23/535 ,  H01L29/06 ,  H01L29/423 ,  H01L29/417 ,  H01L29/786 ,  H01L29/08 ,  H01L29/78 ,  H01L21/3213 ,  H01L21/768

Abstract: A semiconductor device includes an active pattern extending in a first horizontal direction on a substrate, a gate electrode extending in a second horizontal direction across the active pattern, and including a first portion, and a second portion protruding upward from the first portion in a vertical direction, a capping pattern extending in the second horizontal direction on the gate electrode, and a gate contact disposed on the second portion of the gate electrode, overlapping the active pattern, and penetrating the capping pattern to connect the gate electrode.