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    Semiconductor device and method for fabricating the same
    3.
    发明授权
    Semiconductor device and method for fabricating the same 有权

    公开(公告)号：US11575014B2

    公开(公告)日：2023-02-07

    申请号：US17227848

    申请日：2021-04-12

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Deok Han Bae ,  Sung Min Kim ,  Ju Hun Park ,  Myung Yoon Um ,  Jong Mil Youn

    IPC: H01L29/417 ,  H01L29/40 ,  H01L29/06 ,  H01L29/66

    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate comprising an element isolation region and an active region defined by the element isolation region, a fin-type pattern on the active region, the fin-type pattern extending in a first horizontal direction, a gate electrode on the fin-type pattern, the gate electrode extending in a second horizontal direction that crosses the first horizontal direction, a capping pattern on the gate electrode, a source/drain region on at least one side of the gate electrode, a source/drain contact on the source/drain region and electrically connected to the source/drain region, and a filling insulating layer on the source/drain contact, the filling insulating layer having a top surface at a same level as a top surface of the capping pattern, and including a material containing a carbon (C) atom.

    Semiconductor device
    4.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US12224315B2

    公开(公告)日：2025-02-11

    申请号：US17516900

    申请日：2021-11-02

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Ju Hun Park ,  Won Cheol Jeong ,  Jin Wook Kim ,  Deok Han Bae ,  Myung Yoon Um ,  In Yeal Lee ,  Yoon Young Jung

    IPC: H01L29/06 ,  H01L29/66

    Abstract: A semiconductor device includes an active pattern extending in a first direction on a substrate, a gate structure on the active pattern and having a gate electrode extending in a second direction intersecting the active pattern, and a gate capping pattern on the gate electrode, the gate capping pattern including a gate capping liner defining a gate capping recess, the gate capping liner having a horizontal portion along an upper surface of the gate electrode, and a vertical portion extending from the horizontal portion in a third direction intersecting the first and second directions, and a gate capping filling film on the gate capping liner and filling the gate capping recess, an epitaxial pattern on the active pattern and adjacent the gate structure, a gate contact on and connected to the gate electrode, and an active contact on and connected to the epitaxial pattern.

    SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME
    7.
    发明申请
    SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME 有权

    公开(公告)号：US20240371876A1

    公开(公告)日：2024-11-07

    申请号：US18775521

    申请日：2024-07-17

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Deok Han Bae ,  Ju Hun Park ,  Myung Yoon Um ,  Ye Ji Lee ,  Yoon Young Jung

    IPC: H01L27/092 ,  H01L23/528 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/786

    Abstract: A semiconductor device includes a substrate having a first power supply region, a second power supply region, and a cell region therein. The cell region extends between the first power supply region and the second power supply region. A first active region and a second active region are provided, which extend side-by-side within the cell region. A first power supply wiring is provided, which extends in the first direction within the first power supply region. A first source/drain contact is provided, which connects the first active region and the second active region. A second source/drain contact is provided, which connects the first active region and the first power supply wiring. The first source/drain contact includes a first recess portion disposed inside an intermediate region between the first active region and the second active region.

    Semiconductor device
    8.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US12094976B2

    公开(公告)日：2024-09-17

    申请号：US17558967

    申请日：2021-12-22

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Deok Han Bae ,  Ju Hun Park ,  Myung Yoon Um ,  Yu Ri Lee ,  In Yeal Lee

    IPC: H01L29/78 ,  H01L29/08

    CPC classification number: H01L29/7851 ,  H01L29/0847

    Abstract: A semiconductor device includes a first fin-shaped pattern which extends lengthwise in a first direction, a second fin-shaped pattern which is spaced apart from the first fin-shaped pattern in a second direction and extends lengthwise in the first direction, a first gate electrode extending lengthwise in the second direction on the first fin-shaped pattern, a second gate electrode extending lengthwise in the second direction on the second fin-shaped pattern, a first gate separation structure which separates the first gate electrode and the second gate electrode and is at the same vertical level as the first gate electrode and the second gate electrode, and a first source/drain contact extending lengthwise in the second direction on the first fin-shaped pattern and the second fin-shaped pattern. The first source/drain contact includes a first lower source/drain contact region which intersects the first fin-shaped pattern and the second fin-shaped pattern, and a first upper source/drain contact region which protrudes from the first lower source/drain contact region, and the first upper source/drain contact region does not overlap the first gate separation structure in the first direction.

    SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME
    9.
    发明申请
    SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME 有权

    公开(公告)号：US20220262797A1

    公开(公告)日：2022-08-18

    申请号：US17511923

    申请日：2021-10-27

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Deok Han Bae ,  Ju Hun Park ,  Myung Yoon Um ,  Ye Ji Lee ,  Yoon Young Jung

    IPC: H01L27/092 ,  H01L29/417 ,  H01L23/528 ,  H01L29/423 ,  H01L29/786 ,  H01L29/06

    Abstract: A semiconductor device includes a substrate having a first power supply region, a second power supply region, and a cell region therein. The cell region extends between the first power supply region and the second power supply region. A first active region and a second active region are provided, which extend side-by-side within the cell region. A first power supply wiring is provided, which extends in the first direction within the first power supply region. A first source/drain contact is provided, which connects the first active region and the second active region. A second source/drain contact is provided, which connects the first active region and the first power supply wiring. The first source/drain contact includes a first recess portion disposed inside an intermediate region between the first active region and the second active region.

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