知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

4 records (took 0.014 seconds)

    Methods of manufacturing semiconductor devices including device isolation processes
    2.
    发明授权
    Methods of manufacturing semiconductor devices including device isolation processes 有权
    制造包括器件隔离工艺的半导体器件的方法

    公开(公告)号：US09564369B1

    公开(公告)日：2017-02-07

    申请号：US15189664

    申请日：2016-06-22

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ju-Youn Kim ,  Min-Choul Kim ,  Bo-Soon Kim ,  Min-Yeop Park ,  Sang-Min Lee

    IPC: H01L21/336 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/3213 ,  H01L21/762 ,  H01L21/3065 ,  H01L21/311

    CPC classification number: H01L21/823431 ,  H01L21/3065 ,  H01L21/31111 ,  H01L21/32134 ,  H01L21/76224 ,  H01L21/823437 ,  H01L21/823481 ,  H01L21/823821 ,  H01L21/823878 ,  H01L29/66545 ,  H01L29/6656

    Abstract: Methods are provided for manufacturing semiconductor devices include forming a first fin protruding on a substrate and extending in a first direction; forming first and second sacrificial gate insulating layers on the first fin, the first and second sacrificial gate insulating layers intersecting the first fin and being spaced apart from each other; forming first and second sacrificial gate electrodes respectively on the first and second sacrificial gate insulating layers; forming a first insulating layer on the first and second sacrificial gate electrodes; removing a portion of the first insulating layer to expose the second sacrificial gate electrode; removing the exposed second sacrificial gate electrode using a first etching process to expose the second sacrificial gate insulating layer; removing the exposed second sacrificial gate insulating layer using a second etching process different from the first etching process to form a first trench which exposes the first fin; forming a first recess in the exposed first fin using a third etching process different from the second etching process; and filling the first recess with a first device isolation layer.

    Abstract translation: 提供用于制造半导体器件的方法包括形成在基板上突出并沿第一方向延伸的第一鳍; 在所述第一翅片上形成第一和第二牺牲栅极绝缘层，所述第一和第二牺牲栅绝缘层与所述第一鳍片相交并且彼此间隔开; 在第一和第二牺牲栅极绝缘层上分别形成第一和第二牺牲栅电极; 在所述第一和第二牺牲栅电极上形成第一绝缘层; 去除所述第一绝缘层的一部分以暴露所述第二牺牲栅电极; 使用第一蚀刻工艺去除所暴露的第二牺牲栅电极以暴露第二牺牲栅极绝缘层; 使用与第一蚀刻工艺不同的第二蚀刻工艺去除暴露的第二牺牲栅极绝缘层，以形成暴露第一鳍片的第一沟槽; 使用与第二蚀刻工艺不同的第三蚀刻工艺在暴露的第一翅片中形成第一凹部; 以及用第一器件隔离层填充第一凹部。

    SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20160380052A1

    公开(公告)日：2016-12-29

    申请号：US15015937

    申请日：2016-02-04

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： JU-YOUN KIM ,  Min-Choul Kim ,  Baik-Min Sung ,  Sang-Hyun Woo

    IPC: H01L29/06 ,  H01L27/092 ,  H01L29/78

    CPC classification number: H01L21/76224 ,  H01L21/76232 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/0653 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/785

    Abstract: A semiconductor device includes a fin protruding from a substrate and extending in a first direction, first and second gate structures intersecting the fin, a recess formed in the fin between the first and second gate structures, a device isolation layer which fills the recess, and which has an upper surface protruded outwardly from the fin and disposed to be coplanar with upper surfaces of the first and second gate structures, a liner formed along a side walls of the device isolation layer protruded outwardly from the fin and a source/drain region disposed at both sides of the recess and spaced apart from the device isolation layer.

    Abstract translation: 半导体器件包括从基板突出并沿第一方向延伸的翅片，与翅片相交的第一和第二栅极结构，形成在第一和第二栅极结构之间的翅片中的凹部，填充凹部的器件隔离层和 其具有从所述翅片向外突出并且设置成与所述第一和第二栅极结构的上表面共面的上表面，沿着从所述鳍片向外突出的所述器件隔离层的侧壁形成的衬垫和设置在所述第二栅极结构的源极/漏极区域 在凹槽的两侧并与器件隔离层隔开。

Patent Agency Ranking