公开(公告)号：US09564369B1

公开(公告)日：2017-02-07

申请号：US15189664

申请日：2016-06-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-Youn Kim ,  Min-Choul Kim ,  Bo-Soon Kim ,  Min-Yeop Park ,  Sang-Min Lee

IPC: H01L21/336 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/3213 ,  H01L21/762 ,  H01L21/3065 ,  H01L21/311

CPC classification number: H01L21/823431 ,  H01L21/3065 ,  H01L21/31111 ,  H01L21/32134 ,  H01L21/76224 ,  H01L21/823437 ,  H01L21/823481 ,  H01L21/823821 ,  H01L21/823878 ,  H01L29/66545 ,  H01L29/6656

Abstract: Methods are provided for manufacturing semiconductor devices include forming a first fin protruding on a substrate and extending in a first direction; forming first and second sacrificial gate insulating layers on the first fin, the first and second sacrificial gate insulating layers intersecting the first fin and being spaced apart from each other; forming first and second sacrificial gate electrodes respectively on the first and second sacrificial gate insulating layers; forming a first insulating layer on the first and second sacrificial gate electrodes; removing a portion of the first insulating layer to expose the second sacrificial gate electrode; removing the exposed second sacrificial gate electrode using a first etching process to expose the second sacrificial gate insulating layer; removing the exposed second sacrificial gate insulating layer using a second etching process different from the first etching process to form a first trench which exposes the first fin; forming a first recess in the exposed first fin using a third etching process different from the second etching process; and filling the first recess with a first device isolation layer.

Abstract translation: 提供用于制造半导体器件的方法包括形成在基板上突出并沿第一方向延伸的第一鳍; 在所述第一翅片上形成第一和第二牺牲栅极绝缘层，所述第一和第二牺牲栅绝缘层与所述第一鳍片相交并且彼此间隔开; 在第一和第二牺牲栅极绝缘层上分别形成第一和第二牺牲栅电极; 在所述第一和第二牺牲栅电极上形成第一绝缘层; 去除所述第一绝缘层的一部分以暴露所述第二牺牲栅电极; 使用第一蚀刻工艺去除所暴露的第二牺牲栅电极以暴露第二牺牲栅极绝缘层; 使用与第一蚀刻工艺不同的第二蚀刻工艺去除暴露的第二牺牲栅极绝缘层，以形成暴露第一鳍片的第一沟槽; 使用与第二蚀刻工艺不同的第三蚀刻工艺在暴露的第一翅片中形成第一凹部; 以及用第一器件隔离层填充第一凹部。