-
公开(公告)号:US20210375764A1
公开(公告)日:2021-12-02
申请号:US17399043
申请日:2021-08-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: JUNGWOO SONG , Ye-Ro LEE , Kwangtae HWANG , Kwangmin KIM , YONG KWAN KIM , JIYOUNG KIM
IPC: H01L23/532 , H01L27/02 , H01L27/108 , H01L21/768
Abstract: A semiconductor device including a substrate includes an active region. A bit line structure extends across the active region. A landing pad is disposed on an end portion of the active region. A first spacer is disposed between the bit line structure and the landing pad. A second spacer is disposed between the first spacer and the landing pad. An air spacer is disposed between the first spacer and the second spacer. A capping pattern is disposed between a sidewall of the landing pad and a sidewall of the bit line structure. The capping pattern defines a top surface of the air spacer and comprises a metallic material.
-
公开(公告)号:US20200006231A1
公开(公告)日:2020-01-02
申请号:US16561008
申请日:2019-09-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: JUNGWOO SONG , Ye-Ro LEE , Kwangtae HWANG , Kwangmin KIM , YONG KWAN KIM , JIYOUNG KIM
IPC: H01L23/532 , H01L27/02 , H01L27/108
Abstract: A semiconductor device including a substrate includes an active region. A bit line structure extends across the active region. A landing pad is disposed on an end portion of the active region. A first spacer is disposed between the bit line structure and the landing pad. A second spacer is disposed between the first spacer and the landing pad. An air spacer is disposed between the first spacer and the second spacer. A capping pattern is disposed between a sidewall of the landing pad and a sidewall of the bit line structure. The capping pattern defines a top surface of the air spacer and comprises a metallic material.
-
公开(公告)号:US20180331046A1
公开(公告)日:2018-11-15
申请号:US16026937
申请日:2018-07-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kiseok LEE , Sooho SHIN , Juik LEE , Jun Ho LEE , Kwangmin KIM , Ilyoung MOON , Jemin PARK , Bumseok SEO , Chan-Sic YOON , Hoin LEE
IPC: H01L23/544 , H01L27/108
CPC classification number: H01L23/544 , H01L27/10814 , H01L27/10823 , H01L27/10876 , H01L27/10885 , H01L27/10894 , H01L27/10897 , H01L2223/5442 , H01L2223/54426 , H01L2223/5446
Abstract: A semiconductor device includes an alignment key on a substrate. The alignment key includes a first sub-alignment key pattern with a first conductive pattern, a second conductive pattern, and a capping dielectric pattern that are sequentially stacked on the substrate, an alignment key trench that penetrates at least a portion of the first sub-alignment key pattern, and a lower conductive pattern in the alignment key trench. The alignment key trench includes an upper trench that is provided in the capping dielectric pattern that has a first width, and a lower trench that extends downward from the upper trench and that has a second width less than the first width. The lower conductive pattern includes sidewall conductive patterns that are separately disposed on opposite sidewalls of the lower trench.
-
公开(公告)号:US20240212637A1
公开(公告)日:2024-06-27
申请号:US18593541
申请日:2024-03-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyunki KIM , Kwangmin KIM , Hyuntaek NA , Wunkil LEE , Hongchul LEE , Gucheol JEONG , Hyeonjin CHOI
IPC: G09G3/34
CPC classification number: G09G3/3426 , G09G2320/0233 , G09G2320/0626 , G09G2330/021
Abstract: A display apparatus comprising: a first power supply unit; a second power supply unit; a first switching unit; a second switching unit; a display panel; a backlight unit for providing light to the display panel by means of the first light emitting elements and second light emitting elements; a first driver for driving the first light emitting elements using the supplied power; a second driver for driving the second light emitting elements using supplied power; and at least one processor, individually and/or collectively, configured to provide power supplied from the first power supply unit and the second power supply unit to the first driver and the second driver, or provide power supplied from only the first power supply to the first driver and the second driver, by controlling the first switching unit and the second switching unit based on user input for adjusting luminance of the display panel.
-
公开(公告)号:US20230410717A1
公开(公告)日:2023-12-21
申请号:US18456977
申请日:2023-08-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kwangmin KIM , Daegun KIM , Yonghun SON
CPC classification number: G09G3/2085 , G09G3/3433 , G09G2310/0243 , G09G2370/08 , G09G2300/026
Abstract: A display apparatus is disclosed. The display apparatus comprises: a first display module having an infrared (IR) signal receiver and a first wired port and second wired port configured to be connected to local area network (LAN) cables; and a second display module having a third wired port and fourth wired port configured to be connected to LAN cables, wherein the first display module is configured to: transmit a received IR signal to the second display module via a first LAN cable connected to the second wired port and third wired port, based on the IR signal received via the IR signal reception unit being a signal for controlling the second display module, and transmit a received control signal to the second display module via a second LAN cable, based on the control signal being received, via the second LAN cable, from an external device connected via the first wired port, and the second display module is configured to transmit an IR signal or a control signal to a neighboring third display module via a third LAN cable connected to the fourth wired port, based on the IR signal or the control signal being received via the first LAN cable.
-
公开(公告)号:US20210335790A1
公开(公告)日:2021-10-28
申请号:US17371452
申请日:2021-07-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jungwoo SONG , Kwangmin KIM , Jun Ho LEE , Hyuckjin KANG , Yong Kwan KIM , Sangyeon HAN , Seguen PARK
IPC: H01L27/108 , H01L29/06 , H01L23/532 , H01L27/24 , H01L27/22
Abstract: Provided are a semiconductor memory device and a method of fabricating the same. The semiconductor memory device may include: a first impurity doped region and a second impurity doped region spaced apart from each other in a semiconductor substrate, a bit line electrically connected to the first impurity doped region and crossing over the semiconductor substrate, a storage node contact electrically connected to the second impurity doped region, a first spacer and a second spacer disposed between the bit line and the storage node contact, and an air gap region disposed between the first spacer and the second spacer. The first spacer may cover a sidewall of the bit line, and the second spacer may be adjacent to the storage node contact. A top end of the first spacer may have a height higher than a height of a top end of the second spacer.
-
公开(公告)号:US20180174971A1
公开(公告)日:2018-06-21
申请号:US15706655
申请日:2017-09-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: JUNGWOO SONG , Ye-Ro LEE , Kwangtae HWANG , Kwangmin KIM , YONG KWAN KIM , JIYOUNG KIM
IPC: H01L23/532 , H01L27/108 , H01L27/02
Abstract: A semiconductor device including a substrate includes an active region. A bit line structure extends across the active region. A landing pad is disposed on an end portion of the active region. A first spacer is disposed between the bit line structure and the landing pad. A second spacer is disposed between the first spacer and the landing pad. An air spacer is disposed between the first spacer and the second spacer. A capping pattern is disposed between a sidewall of the landing pad and a sidewall of the bit line structure. The capping pattern defines a top surface of the air spacer and comprises a metallic material.
-
-
-
-
-
-