公开(公告)号：US20180331046A1

公开(公告)日：2018-11-15

申请号：US16026937

申请日：2018-07-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kiseok LEE ,  Sooho SHIN ,  Juik LEE ,  Jun Ho LEE ,  Kwangmin KIM ,  Ilyoung MOON ,  Jemin PARK ,  Bumseok SEO ,  Chan-Sic YOON ,  Hoin LEE

IPC: H01L23/544 ,  H01L27/108

CPC classification number: H01L23/544 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10876 ,  H01L27/10885 ,  H01L27/10894 ,  H01L27/10897 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/5446

Abstract: A semiconductor device includes an alignment key on a substrate. The alignment key includes a first sub-alignment key pattern with a first conductive pattern, a second conductive pattern, and a capping dielectric pattern that are sequentially stacked on the substrate, an alignment key trench that penetrates at least a portion of the first sub-alignment key pattern, and a lower conductive pattern in the alignment key trench. The alignment key trench includes an upper trench that is provided in the capping dielectric pattern that has a first width, and a lower trench that extends downward from the upper trench and that has a second width less than the first width. The lower conductive pattern includes sidewall conductive patterns that are separately disposed on opposite sidewalls of the lower trench.