公开(公告)号：US20230040502A1

公开(公告)日：2023-02-09

申请号：US17723845

申请日：2022-04-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byongguk PARK ,  Jeong-Heon PARK ,  Kyung-Jin LEE ,  Jeongchun RYU

IPC: H01L43/04 ,  H01L43/06 ,  H01F10/32 ,  H01L27/22 ,  G11C11/16

Abstract: A magnetic memory device includes a conductive line extending in a first direction, a magnetic tunnel junction structure on a first surface of the conductive line, the magnetic tunnel junction structure comprising at least two magnetic patterns and a barrier pattern between the at least two magnetic patterns, and a magnetic layer on a second surface of the conductive line, which is opposite to the first surface. The magnetic layer includes magnetization components having a magnetization in a direction which is parallel to the second surface and intersects the first direction.

公开(公告)号：US20220383923A1

公开(公告)日：2022-12-01

申请号：US17576047

申请日：2022-01-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Whankyun KIM ,  Jeong-Heon PARK ,  Heeju SHIN ,  Youngjun CHO ,  Joonmyoung LEE ,  Junho JEONG

IPC: G11C11/16 ,  H01L43/10 ,  H01L43/08 ,  H01L27/22 ,  H01L43/02

Abstract: Disclosed is a magnetic memory device including a pinned magnetic pattern and a free magnetic pattern that are sequentially stacked on a substrate, a tunnel barrier pattern between the pinned magnetic pattern and the free magnetic pattern, a top electrode on the free magnetic pattern, and a capping pattern between the free magnetic pattern and the top electrode. The capping pattern includes a lower capping pattern, an upper capping pattern between the lower capping pattern and the top electrode, a first non-magnetic pattern between the lower capping pattern and the upper capping pattern, and a second non-magnetic pattern between the first non-magnetic pattern and the upper capping pattern. Each of the lower capping pattern and the upper capping pattern includes a non-magnetic metal. The first non-magnetic pattern and the second non-magnetic pattern include different metals from each other.

公开(公告)号：US20210102285A1

公开(公告)日：2021-04-08

申请号：US16898609

申请日：2020-06-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jeong-Heon PARK ,  Whankyun KIM ,  Sukhoon KIM ,  Junho JEONG

IPC: C23C14/46 ,  H01L21/687

Abstract: An ion beam deposition apparatus includes a substrate assembly to secure a substrate, a target assembly slanted with respect to the substrate assembly, the target assembly including a target with deposition materials, an ion gun to inject ion beams onto the target, such that ions of the deposition materials are discharged toward the substrate assembly to form a thin layer on the substrate, and a substrate heater to heat the substrate to a deposition temperature higher than a room temperature.

公开(公告)号：US20230111057A1

公开(公告)日：2023-04-13

申请号：US17734455

申请日：2022-05-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Chul LEE ,  Kwang Seok KIM ,  Jeong-Heon PARK

IPC: H01L43/02 ,  H01L43/10

Abstract: A magnetic tunnel junction device includes a pinned magnetic layer, a free magnetic layer, and a tunnel barrier layer between the pinned and free magnetic layers. The free magnetic layer includes a first free layer, a second free layer spaced apart from the tunnel barrier layer with the first free layer therebetween, and a spacer layer between the first free layer and the second free layer. The first free layer and the second free layer are antiferromagnetically coupled to each other by the spacer layer, and each of the first free layer and the second free layer has a magnetization direction substantially perpendicular to an interface between the free magnetic layer and the tunnel barrier layer. A thermal stability of the free magnetic layer is in a range of 0 to 15.

公开(公告)号：US20220320418A1

公开(公告)日：2022-10-06

申请号：US17502411

申请日：2021-10-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Whankyun KIM ,  Joonmyoung LEE ,  Junho JEONG ,  Eunsun NOH ,  Jeong-Heon PARK ,  YoungJun CHO

IPC: H01L43/02 ,  H01L43/10 ,  H01L43/12 ,  H01L27/22

Abstract: A magnetic memory device including a substrate; a first and second magnetic pattern stacked on the substrate; a tunnel barrier pattern between the first and second magnetic pattern; a bottom electrode between the substrate and the first magnetic pattern; a seed pattern between the bottom electrode and the first magnetic pattern; and a diffusion barrier pattern between the bottom electrode and the seed pattern, wherein a bottom surface of the at least one diffusion barrier pattern is in contact with a top surface of the bottom electrode, and a top surface of the at least one diffusion barrier pattern is in contact with a bottom surface of the seed pattern, the at least one diffusion barrier pattern includes a non-magnetic metal, or an alloy of the non-magnetic metal and a non-metal element, and the non-magnetic metal includes Ta, W, Nb, Ti, Cr, Zr, Hf, Mo, Al, Mg, or V.

公开(公告)号：US20220123201A1

公开(公告)日：2022-04-21

申请号：US17490353

申请日：2021-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ung Hwan PI ,  Seonggeon PARK ,  Jeong-Heon PARK ,  Sung Chul LEE

IPC: H01L43/02 ,  H01L27/22 ,  H01F10/32

Abstract: A magnetic memory device includes a first magnetic layer extending in a first direction, a pinned layer on the first magnetic layer, and a second magnetic layer vertically overlapping with the pinned layer with the first magnetic layer interposed between the pinned layer and the second magnetic layer. The first magnetic layer includes, a plurality of magnetic domains arranged in the first direction, and at least one magnetic domain wall between the plurality of magnetic domains, and a magnetization direction of the second magnetic layer is substantially parallel to a top surface of the first magnetic layer.

公开(公告)号：US20240249760A1

公开(公告)日：2024-07-25

申请号：US18593293

申请日：2024-03-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Whankyun KIM ,  Jeong-Heon PARK ,  Heeju SHIN ,  YoungJun CHO ,  Joonmyoung LEE ,  Junho JEONG

IPC: G11C11/16 ,  H10B61/00 ,  H10N50/10 ,  H10N50/80 ,  H10N50/85

CPC classification number: G11C11/161 ,  H10B61/00 ,  H10N50/10 ,  H10N50/80 ,  H10N50/85

Abstract: Disclosed is a magnetic memory device including a pinned magnetic pattern and a free magnetic pattern that are sequentially stacked on a substrate, a tunnel barrier pattern between the pinned magnetic pattern and the free magnetic pattern, a top electrode on the free magnetic pattern, and a capping pattern between the free magnetic pattern and the top electrode. The capping pattern includes a lower capping pattern, an upper capping pattern between the lower capping pattern and the top electrode, a first non-magnetic pattern between the lower capping pattern and the upper capping pattern, and a second non-magnetic pattern between the first non-magnetic pattern and the upper capping pattern. Each of the lower capping pattern and the upper capping pattern includes a non-magnetic metal. The first non-magnetic pattern and the second non-magnetic pattern include different metals from each other.

公开(公告)号：US20220293157A1

公开(公告)日：2022-09-15

申请号：US17684573

申请日：2022-03-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeong-Heon PARK ,  Ung Hwan PI

IPC: G11C11/16 ,  G11C11/18

Abstract: Disclosed are a memristor element, a synapse element and a neuromorphic processor including the same. The memristor element includes a free layer including a domain wall; and a fixed layer including a material of which a magnetization direction is fixed, wherein a position of the domain wall in the free layer is changeable based on a spin orbit torque (SOT) generated by a current introduced from an outside, and wherein a resistance value, measured through both ends of the fixed layer, is based on the position of the domain wall and on a Hall voltage.

公开(公告)号：US20200136020A1

公开(公告)日：2020-04-30

申请号：US16727986

申请日：2019-12-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yong-Sung PARK ,  Woo-Jin KIM ,  Jeong-Heon PARK ,  Se-Chung OH ,  Joon-Myoung LEE ,  Hyun CHO

IPC: H01L43/02 ,  H01L27/22 ,  H01L43/12 ,  H01L43/10

Abstract: The methods of manufacturing an MRAM device and MRAM devices are provided. The methods may include forming a first electrode on an upper surface of a substrate, forming a first magnetic layer on the first electrode, forming a tunnel barrier structure on the first magnetic layer, forming a second magnetic layer on the tunnel barrier structure, and forming a second electrode on the second magnetic layer. The tunnel barrier structure may include a first tunnel barrier layer and a second tunnel barrier layer that are sequentially stacked on the first magnetic layer and may have different resistivity distributions from each other along a horizontal direction that may be parallel to the upper surface of the substrate.

公开(公告)号：US20200091412A1

公开(公告)日：2020-03-19

申请号：US16352957

申请日：2019-03-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joonmyoung LEE ,  Yong Sung PARK ,  Jeong-Heon PARK ,  Hyun CHO ,  Ung Hwan PI

IPC: H01L43/02 ,  H01L43/10 ,  H01L43/12 ,  H01L27/22 ,  G11C14/00 ,  H01L21/67

Abstract: A magnetic memory device, a method for manufacturing a magnetic memory device, and a substrate treating apparatus, the device including a substrate including a first memory region and a second memory region; a first magnetic tunnel junction pattern on the first memory region, the first magnetic tunnel junction pattern including a first free pattern and a first oxide pattern on the first free pattern; and a second magnetic tunnel junction pattern on the second memory region, the second magnetic tunnel junction pattern including a second free pattern and a second oxide pattern on the second free pattern, wherein a ratio of a thickness of the first oxide pattern to a thickness of the first free pattern is different from a ratio of a thickness of the second oxide pattern to a thickness of the second free pattern.