公开(公告)号：US20140284764A1

公开(公告)日：2014-09-25

申请号：US14095998

申请日：2013-12-03

申请人： Samsung Electronics Co., Ltd.

发明人： JONG-WON LEE

IPC分类号： H01L25/16 ,  H01L23/34

CPC分类号： H01L25/16 ,  H01L23/367 ,  H01L23/3675 ,  H01L23/49822 ,  H01L23/552 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16251 ,  H01L2924/167 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/014

摘要： Provided is a semiconductor package including a substrate, a semiconductor chip and a passive device disposed on the substrate, and a heat slug configured to cover the semiconductor chip and the passive device. The substrate and a first electrode of the passive device are electrically connected to each other, and the heat slug and a second electrode of the passive device are electrically connected to each other. The semiconductor package may include multiple passive devices in which a vertical height of each passive device is greater than a horizontal width thereof. Also disclosed is an electronic system, which may include a power supply unit, a microprocessor unit, a function unit, and a display controller unit to receive one or more power supply voltages from the power supply unit. At least one of the microprocessor unit, the function unit, or the display controller unit may further include the described semiconductor package.

摘要翻译： 提供了一种半导体封装，其包括衬底，半导体芯片和设置在衬底上的无源器件，以及构造成覆盖半导体芯片和无源器件的散热块。 无源器件的衬底和第一电极彼此电连接，并且无源器件的散热片和第二电极彼此电连接。 半导体封装可以包括多个无源器件，其中每个无源器件的垂直高度大于其水平宽度。 还公开了一种电子系统，其可以包括从电源单元接收一个或多个电源电压的电源单元，微处理器单元，功能单元和显示控制器单元。 微处理器单元，功能单元或显示控制器单元中的至少一个还可以包括所描述的半导体封装。

公开(公告)号：US20170115973A1

公开(公告)日：2017-04-27

申请号：US15292608

申请日：2016-10-13

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： JONG-WON LEE ,  JUN-MO PARK

IPC分类号： G06F9/45

CPC分类号： G06F8/4441 ,  G06F8/48

摘要： An operating method of a semiconductor device includes searching for a loop code from an original Intermediate Representation (IR) generated by a compiler; determining whether the loop code satisfies a predefined condition; calculating the loop code using an interpreter separate from the compiler when the loop code is determined to satisfy the predefined condition, wherein the interpreter includes an interpreter frame; storing a result of the calculating the loop code in the interpreter frame; and substituting the loop code in the original IR with an access code for accessing the result to generate an updated IR.

公开(公告)号：US20140235047A1

公开(公告)日：2014-08-21

申请号：US14264622

申请日：2014-04-29

申请人： Samsung Electronics Co., Ltd.

发明人： JONG-WON LEE ,  Bo-Un YOON ,  Seung-Jae LEE

IPC分类号： H01L21/28

CPC分类号： H01L21/28008 ,  H01L21/28105 ,  H01L21/823842 ,  H01L29/42376 ,  H01L29/49 ,  H01L29/513 ,  H01L29/66545

摘要： Methods of forming gates of semiconductor devices are provided. The methods may include forming a first recess in a first substrate region having a first conductivity type and forming a second recess in a second substrate region having a second conductivity type. The methods may also include forming a high-k layer in the first and second recesses. The methods may further include providing a first metal on the high-k layer in the first and second substrate regions, the first metal being provided within the second recess. The methods may additionally include removing at least portions of the first metal from the second recess while protecting materials within the first recess from removal. The methods may also include, after removing at least portions of the first metal from the second recess, providing a second metal within the second recess.

摘要翻译： 提供了形成半导体器件的栅极的方法。 所述方法可以包括在具有第一导电类型的第一衬底区域中形成第一凹槽，并在具有第二导电类型的第二衬底区域中形成第二凹部。 所述方法还可以包括在第一和第二凹部中形成高k层。 所述方法还可以包括在第一和第二衬底区域中的高k层上提供第一金属，第一金属设置在第二凹槽内。 所述方法还可以包括从第二凹部移除第一金属的至少一部分，同时保护第一凹槽内的材料不被去除。 所述方法还可以包括在从第二凹部去除第一金属的至少一部分之后，在第二凹部内提供第二金属。