发明申请
- 专利标题: METHODS OF FORMING GATES OF SEMICONDUCTOR DEVICES
- 专利标题(中): 形成半导体器件栅的方法
-
申请号: US14264622申请日: 2014-04-29
-
公开(公告)号: US20140235047A1公开(公告)日: 2014-08-21
- 发明人: JONG-WON LEE , Bo-Un YOON , Seung-Jae LEE
- 申请人: Samsung Electronics Co., Ltd.
- 申请人地址: KR Suwon-si
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR Suwon-si
- 优先权: KR10-2010-0097326 20101006
- 主分类号: H01L21/28
- IPC分类号: H01L21/28
摘要:
Methods of forming gates of semiconductor devices are provided. The methods may include forming a first recess in a first substrate region having a first conductivity type and forming a second recess in a second substrate region having a second conductivity type. The methods may also include forming a high-k layer in the first and second recesses. The methods may further include providing a first metal on the high-k layer in the first and second substrate regions, the first metal being provided within the second recess. The methods may additionally include removing at least portions of the first metal from the second recess while protecting materials within the first recess from removal. The methods may also include, after removing at least portions of the first metal from the second recess, providing a second metal within the second recess.
公开/授权文献
- US08962415B2 Methods of forming gates of semiconductor devices 公开/授权日:2015-02-24
信息查询
IPC分类: