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公开(公告)号:US20230207429A1
公开(公告)日:2023-06-29
申请号:US18119560
申请日:2023-03-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JUNG-HO DO , TAE-JOONG SONG , SEUNG-YOUNG LEE , JONG-HOON JUNG
IPC: H01L23/48 , H01L23/482 , H01L27/02 , H01L27/118 , H01L23/485 , H01L21/768 , G06F30/394
CPC classification number: H01L23/481 , G06F30/394 , H01L21/76895 , H01L23/482 , H01L23/485 , H01L27/0207 , H01L27/11807 , G06F30/392 , H01L2027/11875
Abstract: An integrated circuit includes first and second active regions extending in a first direction, a first gate line extending in a second direction substantially perpendicular to the first direction and crossing the first and second active regions, and a first contact jumper including a first conductive pattern intersecting the first gate line above the first active region and a second conductive pattern extending in the second direction above the first gate line and connected to the first conductive pattern.
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公开(公告)号:US20240203974A1
公开(公告)日:2024-06-20
申请号:US18596731
申请日:2024-03-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: JUNG-HO DO , DAL-HEE LEE , JIN-YOUNG LIM , TAE-JOONG SONG , JONG-HOON JUNG
IPC: H01L27/02 , G06F30/00 , G11C5/06 , G11C8/16 , G11C11/412 , H01L21/768 , H01L27/088 , H01L27/118
CPC classification number: H01L27/0207 , G06F30/00 , G11C5/063 , G11C8/16 , G11C11/412 , H01L21/76895 , H01L27/088 , H01L27/11807 , H01L2027/11875
Abstract: An integrated circuit may include a first active region and a second active region, and the first and second active regions may extend on a substrate in a first horizontal direction in parallel to each other and have different conductivity types from each other. A first gate line may extend in a second horizontal direction crossing the first horizontal direction, and may form a first transistor with the first active region. The first transistor may include a gate to which a first input signal is applied. The first gate line may include a first partial gate line that overlaps the first active region in a perpendicular direction and that has an end on a region between the first and second active regions.
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公开(公告)号:US20230223319A1
公开(公告)日:2023-07-13
申请号:US18123296
申请日:2023-03-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JUNG-HO DO , TAE-JOONG SONG , SEUNG-YOUNG LEE , JONG-HOON JUNG
IPC: H01L23/48 , H01L27/02 , G06F30/394 , H01L23/482 , H01L23/485 , H01L21/768 , H01L27/118 , G06F30/392
CPC classification number: H01L23/481 , H01L27/0207 , G06F30/394 , H01L23/482 , H01L23/485 , H01L21/76895 , H01L27/11807 , G06F30/392 , H01L2027/11875
Abstract: An integrated circuit includes first and second active regions extending in a first direction, a first gate line extending in a second direction substantially perpendicular to the first direction and crossing the first and second active regions, and a first contact jumper including a first conductive pattern intersecting the first gate line above the first active region and a second conductive pattern extending in the second direction above the first gate line and connected to the first conductive pattern.
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公开(公告)号:US20210057310A1
公开(公告)日:2021-02-25
申请号:US17075141
申请日:2020-10-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JUNG-HO DO , TAE-JOONG SONG , SEUNG-YOUNG LEE , JONG-HOON JUNG
IPC: H01L23/48 , H01L23/482 , H01L27/02 , H01L27/118 , H01L23/485 , H01L21/768 , G06F30/394
Abstract: An integrated circuit includes first and second active regions extending in a first direction, a first gate line extending in a second direction substantially perpendicular to the first direction and crossing the first and second active regions, and a first contact jumper including a first conductive pattern intersecting the first gate line above the first active region and a second conductive pattern extending in the second direction above the first gate line and connected to the first conductive pattern.
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公开(公告)号:US20170098608A1
公开(公告)日:2017-04-06
申请号:US14874916
申请日:2015-10-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JONG-HOON JUNG
IPC: H01L23/528 , H01L27/02 , H01L29/417 , H01L23/50 , H01L23/522
CPC classification number: H01L23/5286 , H01L23/50 , H01L23/5226 , H01L27/0207 , H01L27/11582 , H01L28/00 , H01L29/41758
Abstract: A semiconductor device is provided as follows. An active region extends along a first direction. A gate line overlaps the active region and extending along a second direction intersecting the first direction. A power rail has a main pattern extending along the first direction and a sub-pattern branching off from the main pattern to extend along the second direction. A first source/drain contact, electrically connected to the power rail, overlaps the active region and the sub-pattern.
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公开(公告)号:US20190252297A1
公开(公告)日:2019-08-15
申请号:US16394961
申请日:2019-04-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JUNG-HO DO , TAE-JOONG SONG , SEUNG-YOUNG LEE , JONG-HOON JUNG
IPC: H01L23/48 , G06F17/50 , H01L23/482 , H01L27/02 , H01L27/118
Abstract: An integrated circuit includes first and second active regions extending in a first direction, a first gate line extending in a second direction substantially perpendicular to the first direction and crossing the first and second active regions, and a first contact jumper including a first conductive pattern intersecting the first gate line above the first active region and a second conductive pattern extending in the second direction above the first gate line and connected to the first conductive pattern.
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公开(公告)号:US20180226323A1
公开(公告)日:2018-08-09
申请号:US15865941
申请日:2018-01-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JUNG-HO DO , TAE-JOONG SONG , SEUNG-YOUNG LEE , JONG-HOON JUNG
IPC: H01L23/48 , G06F17/50 , H01L23/482
CPC classification number: H01L23/481 , G06F17/5072 , G06F17/5077 , H01L23/482 , H01L27/0207
Abstract: An integrated circuit includes first and second active regions extending in a first direction, a first gate line extending in a second direction substantially perpendicular to the first direction and crossing the first and second active regions, and a first contact jumper including a first conductive pattern intersecting the first gate line above the first active region and a second conductive pattern extending in the second direction above the first gate line and connected to the first conductive pattern.
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公开(公告)号:US20180005692A1
公开(公告)日:2018-01-04
申请号:US15469037
申请日:2017-03-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JONG-HOON JUNG , SUNG-HYUN PARK , WOO-JIN RIM
IPC: G11C11/419 , G11C11/418
CPC classification number: G11C11/419 , G11C7/12 , G11C11/418
Abstract: A memory device includes a memory cell array including a plurality of memory cells, a plurality of word lines connected to the plurality of memory cells, a plurality of bit lines connected to the plurality of memory cells, a plurality of complementary bit lines connected to the plurality of memory cells, a plurality of auxiliary bit lines, a plurality of auxiliary complementary bit lines, and a switch circuit. The switch circuit electrically connects the plurality of auxiliary bit lines to the plurality of bit lines during a write operation, electrically connects the plurality of auxiliary complementary bit lines to the plurality of complementary hit lines during the write operation, electrically disconnects the plurality of auxiliary bit lines from the plurality of bit lines during a read operation, and electrically disconnects the plurality of auxiliary complementary bit lines from the plurality of complementary bit lines during the read operation.
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公开(公告)号:US20170092638A1
公开(公告)日:2017-03-30
申请号:US14870141
申请日:2015-09-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JONG-HOON JUNG
IPC: H01L27/02 , H01L27/11 , H01L27/108 , H01L29/78 , H01L23/528
CPC classification number: H01L27/0292 , H01L23/528 , H01L23/5286 , H01L27/10897 , H01L27/1116 , H01L28/00 , H01L29/78
Abstract: A semiconductor device is provided. The semiconductor device includes an active region, a gate line, a first metal interconnect, a power rail, and a second metal interconnect. The gate line overlaps the active region and extends along a first direction. The first metal interconnect overlaps the active region and the gate line. The first metal interconnect extends along a second direction intersecting the first direction. The power rail is disposed in a higher layer than the first metal interconnect. The power rail extends along the second direction. The second metal interconnect is disposed in a same layer as the power rail, the second metal interconnect extends along the second direction.
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