公开(公告)号：US20190198315A1

公开(公告)日：2019-06-27

申请号：US16265709

申请日：2019-02-01

Applicant: Samsung Electronics Co., Ltd. ,  Soulbrain Co., Ltd.

Inventor： Hoyoung KIM ,  Hyo-Sun LEE ,  Soojin KIM ,  Keonyoung KIM ,  JINHYE BAE ,  HOON HAN ,  Tae Soo KWON ,  Jung Hun LIM

IPC: H01L21/02 ,  C11D7/08 ,  C11D7/26 ,  C11D7/32 ,  H01L21/683 ,  H01L23/00 ,  C11D11/00

CPC classification number: H01L21/02068 ,  C11D7/08 ,  C11D7/261 ,  C11D7/264 ,  C11D7/266 ,  C11D7/3209 ,  C11D7/3218 ,  C11D11/0047 ,  H01L21/02057 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/30625 ,  H01L21/6835 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2221/68327 ,  H01L2221/68381 ,  H01L2224/03002 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/1181 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/3512 ,  H01L2924/37001 ,  H01L2224/11 ,  H01L2224/03

Abstract: Embodiments of the inventive concepts provide a method of manufacturing a semiconductor device and a cleaning composition for an adhesive layer. The method includes preparing a semiconductor substrate to which an adhesive layer adheres, removing the adhesive layer from the semiconductor substrate, and applying a cleaning composition to the semiconductor substrate to remove a residue of the adhesive layer. The cleaning composition includes a solvent including a ketone compound and having a content that is equal to or greater than 40 wt % and less thaadminn 90 wt %, quaternary ammonium salt, and primary amine.

公开(公告)号：US20240337948A1

公开(公告)日：2024-10-10

申请号：US18744751

申请日：2024-06-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： HYOJIN YUN ,  SEUNGWON KIM ,  TAEYOUNG KIM ,  WOOJUNG PARK ,  JINHYE BAE ,  HYUNSEOP SHIN ,  MINTAE LEE ,  HOON HAN ,  MOONYOUNG KIM ,  MOONCHANG KIM ,  CHEOLMO YANG ,  YUNSEOK CHOI

IPC: G03F7/42 ,  B08B3/04 ,  C11D3/04 ,  H01L21/02

CPC classification number: G03F7/425 ,  B08B3/04 ,  C11D3/044 ,  H01L21/0206

Abstract: A photoresist-removing composition includes a polar organic solvent, an alkyl ammonium hydroxide, an aliphatic amine not including a hydroxy group, and a monovalent alcohol. To manufacture a semiconductor device, a photoresist pattern may be formed on a substrate, and the photoresist-removing composition may then be applied to the photoresist pattern. To manufacture a semiconductor package, a photoresist pattern including a plurality of via holes may be formed on a substrate. A plurality of conductive posts including a metal may be formed inside the plurality of via holes, and the photoresist pattern may be removed by applying a photoresist-removing composition of the inventive concept to the photoresist pattern. A semiconductor chip may be adhered to the substrate between the respective conductive posts.

公开(公告)号：US20170062702A1

公开(公告)日：2017-03-02

申请号：US15350009

申请日：2016-11-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungyoon CHUNG ,  JINHYE BAE ,  HYUNGJOON KWON ,  JONGCHUL PARK ,  WONJUN LEE

IPC: H01L43/02 ,  H01L43/10 ,  H01L43/12 ,  H01L43/08

CPC classification number: H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: A method of manufacturing a semiconductor device may include forming a material layer on a substrate, performing a selective oxidation process to form a capping oxide layer on a first surface of the material layer, wherein a second surface of the material layer is not oxidized, and etching the material layer through the second surface to form a material pattern. An etch rate of the capping oxide layer is less than an etch rate of the material layer. A semiconductor device may include a lower electrode on a substrate, a data storage part on a top surface of the lower electrode, an upper electrode on the data storage part, and a capping oxide layer arranged on at least a portion of a top surface of the upper electrode. The capping oxide layer may include an oxide formed by oxidation of an upper surface of the upper electrode.

Abstract translation: 制造半导体器件的方法可以包括在衬底上形成材料层，进行选择性氧化工艺以在材料层的第一表面上形成覆盖氧化物层，其中材料层的第二表面不被氧化，以及 通过第二表面蚀刻材料层以形成材料图案。 覆盖氧化物层的蚀刻速率小于材料层的蚀刻速率。 半导体器件可以包括在基板上的下电极，在下电极的顶表面上的数据存储部分，数据存储部分上的上电极，以及覆盖氧化物层，其设置在 上电极。 覆盖氧化物层可以包括通过氧化上部电极的上表面形成的氧化物。