公开(公告)号：US20240337948A1

公开(公告)日：2024-10-10

申请号：US18744751

申请日：2024-06-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： HYOJIN YUN ,  SEUNGWON KIM ,  TAEYOUNG KIM ,  WOOJUNG PARK ,  JINHYE BAE ,  HYUNSEOP SHIN ,  MINTAE LEE ,  HOON HAN ,  MOONYOUNG KIM ,  MOONCHANG KIM ,  CHEOLMO YANG ,  YUNSEOK CHOI

IPC: G03F7/42 ,  B08B3/04 ,  C11D3/04 ,  H01L21/02

CPC classification number: G03F7/425 ,  B08B3/04 ,  C11D3/044 ,  H01L21/0206

Abstract: A photoresist-removing composition includes a polar organic solvent, an alkyl ammonium hydroxide, an aliphatic amine not including a hydroxy group, and a monovalent alcohol. To manufacture a semiconductor device, a photoresist pattern may be formed on a substrate, and the photoresist-removing composition may then be applied to the photoresist pattern. To manufacture a semiconductor package, a photoresist pattern including a plurality of via holes may be formed on a substrate. A plurality of conductive posts including a metal may be formed inside the plurality of via holes, and the photoresist pattern may be removed by applying a photoresist-removing composition of the inventive concept to the photoresist pattern. A semiconductor chip may be adhered to the substrate between the respective conductive posts.

公开(公告)号：US20220037317A1

公开(公告)日：2022-02-03

申请号：US17451688

申请日：2021-10-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： BEOMJIN PARK ,  DONGIL BAE ,  DAEWON KIM ,  TAEYOUNG KIM ,  JOOHEE JUNG ,  JAEHOON SHIN

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/786 ,  H01L29/423

Abstract: A semiconductor device includes an active pattern extending on a substrate in a first direction, divided into a plurality of regions by a separation region, and having a first edge portion exposed toward the separation region; first, second and third channel layers vertically separated and sequentially disposed on the active pattern; a first gate electrode extending in a second direction, intersecting the active pattern, and surrounding the first, second and third channel layers; source/drain regions disposed on the active pattern, on at least one side of the first gate electrode, and contacting the first, second and third channel layers; a semiconductor structure including first semiconductor layers and second semiconductor layers alternately stacked on the active pattern, and having a second edge portion exposed toward the separation region; and a blocking layer covering at least one of an upper surface, side surfaces, or the second edge portion, of the semiconductor structure.

公开(公告)号：US20210407821A1

公开(公告)日：2021-12-30

申请号：US17212364

申请日：2021-03-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： TAEYOUNG KIM ,  Seokhong Kwon ,  Wonyoung Kim ,  Jinchan Ahn

IPC: H01L21/56 ,  H01L23/24

Abstract: A semiconductor package includes a package substrate, at least one semiconductor chip mounted on the package substrate, a molding member on the package substrate to cover at least a portion of the semiconductor chip, and a mechanical reinforcing member provided around the semiconductor chip within the molding member and extending in at least one direction.

公开(公告)号：US20250081469A1

公开(公告)日：2025-03-06

申请号：US18812283

申请日：2024-08-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KIJOON KIM ,  TAEYOUNG KIM ,  SUHWAN LIM

IPC: H10B51/20 ,  H01L21/28 ,  H01L29/51 ,  H10B51/10

Abstract: A vertical semiconductor device includes: a plurality of insulation patterns on a substrate, the plurality of insulation patterns being spaced apart from each other in a vertical direction; a plurality of channel structures being spaced apart from each other in a first direction, each of the plurality of channel structures including interface insulation patterns, and the plurality of channel structures disposed in a first trench extending in the first direction and passing through the insulation patterns in the vertical direction; a ferroelectric structure on an outer surface of each of the plurality channel structures, the ferroelectric structure protruding in a direction toward a gap between some of the insulation patterns in the vertical direction; and a conductive pattern on a sidewall of the ferroelectric structure, the conductive pattern filling the gap in the vertical direction.

公开(公告)号：US20230152991A1

公开(公告)日：2023-05-18

申请号：US17850723

申请日：2022-06-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： WONJONG SONG ,  SOONYOUNG KIM ,  TAEYOUNG KIM

IPC: G06F3/06

CPC classification number: G06F3/0626 ,  G06F3/0656 ,  G06F3/0679

Abstract: A storage device includes a nonvolatile memory device and a storage controller. The nonvolatile memory device includes a first memory region having a first write speed and a second memory region having a second write speed different from the first write speed. The storage controller includes an internal buffer and stores data from an external host in the first memory region by priority in a first mode. The storage controller controls a data migration operation by performing a read operation-transfer operation to read a second data that is pre-stored in the first memory region by a first unit and to transfer the first unit of data to a data input/output (I/O) circuit of the nonvolatile memory device a plurality of times and by storing the second data transferred to the data I/O circuit in the second memory region.