公开(公告)号：US20240014304A1

公开(公告)日：2024-01-11

申请号：US18170104

申请日：2023-02-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung Bin Chun ,  Jin Bum Kim ,  Dong Suk Shin ,  Gyeom Kim ,  Da Hye Kim

IPC: H01L29/775 ,  H01L29/66 ,  H01L29/423 ,  H01L29/08

CPC classification number: H01L29/775 ,  H01L29/66439 ,  H01L29/66742 ,  H01L29/42392 ,  H01L29/0847

Abstract: A semiconductor device includes a lower pattern on a substrate and protruding in a first direction, a source/drain pattern on the lower pattern and including a semiconductor liner film in contact with the lower pattern, and an epitaxial insulating liner extending along at least a portion of a sidewall of the semiconductor liner film, wherein the epitaxial insulating liner is in contact with the semiconductor liner film, wherein the semiconductor liner film includes a first portion, wherein the first portion of the semiconductor liner film includes a first point spaced apart from the lower pattern at a first height, and a second point spaced apart from the lower pattern at a second height, wherein the second height is greater than the first height, wherein a width of the semiconductor liner film in a second direction at the first point is less than a width of the semiconductor liner film in the second direction at the second point, and wherein the epitaxial insulating liner extends along at least a portion of a sidewall of the first portion of the semiconductor liner film.

公开(公告)号：US20230420519A1

公开(公告)日：2023-12-28

申请号：US18110950

申请日：2023-02-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Da Hye Kim ,  Gyeom Kim ,  Jin Bum Kim ,  Su Jin Jung ,  Kyung Bin Chun

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/161 ,  H01L29/423 ,  H01L29/775 ,  H01L21/02 ,  H01L29/66

CPC classification number: H01L29/0847 ,  H01L29/0673 ,  H01L29/161 ,  H01L29/42392 ,  H01L29/775 ,  H01L21/02532 ,  H01L29/66545 ,  H01L29/66439

Abstract: A semiconductor device having improved performance and reliability. The semiconductor device may include a lower pattern extending in a first direction, and a plurality of sheet patterns spaced apart from the lower pattern in a second direction perpendicular to the first direction. A plurality of gate structures may be on the lower pattern and spaced apart in the first direction, and a source/drain pattern, which may include a semiconductor liner film and a semiconductor filling film on the semiconductor liner film. A liner recess that is defined by an inner surface of the semiconductor liner film may include a plurality of width extension regions, and a width of each width extension region in the first direction may increase and then decreases, as a distance increases in the second direction from an upper surface of the lower pattern.

公开(公告)号：US11515260B2

公开(公告)日：2022-11-29

申请号：US16874284

申请日：2020-05-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Da Hye Kim ,  Dong Kyu Kim ,  Jung-Ho Park

IPC: H01L23/538 ,  H01L23/00 ,  H01L25/16 ,  H01L25/00 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

Abstract: A method for fabricating a semiconductor package includes forming a release layer on a first carrier substrate. An etch stop layer is formed on the release layer. A first redistribution layer is formed on the etch stop layer and includes a plurality of first wires and a first insulation layer surrounding the plurality of first wires. A first semiconductor chip is formed on the first redistribution layer. A solder ball is formed between the first redistribution layer and the first semiconductor chip. A second carrier substrate is formed on the first semiconductor chip. The first carrier substrate, the release layer, and the etch stop layer are removed. The second carrier substrate is removed.

公开(公告)号：US11735663B2

公开(公告)日：2023-08-22

申请号：US17565650

申请日：2021-12-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Bum Kim ,  Gyeom Kim ,  Da Hye Kim ,  Jae Mun Kim ,  Il Gyou Shin ,  Seung Hun Lee ,  Kyung In Choi

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L29/7849 ,  H01L21/02236 ,  H01L21/02532 ,  H01L21/02603 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66742 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/78696

Abstract: Example semiconductor devices and methods for fabricating a semiconductor device are disclosed. An example device may include a substrate, a first semiconductor pattern spaced apart from the substrate, a first antioxidant pattern extending along a bottom surface of the first semiconductor pattern and spaced apart from the substrate, and a field insulating film on the substrate. The insulating film may cover at least a part of a side wall of the first semiconductor pattern. The first antioxidant pattern may include a first semiconductor material film doped with a first impurity.

公开(公告)号：US11233150B2

公开(公告)日：2022-01-25

申请号：US16910819

申请日：2020-06-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Bum Kim ,  Gyeom Kim ,  Da Hye Kim ,  Jae Mun Kim ,  Il Gyou Shin ,  Seung Hun Lee ,  Kyung In Choi

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L29/66 ,  H01L21/02

Abstract: Example semiconductor devices and methods for fabricating a semiconductor device are disclosed. An example device may include a substrate, a first semiconductor pattern spaced apart from the substrate, a first antioxidant pattern extending along a bottom surface of the first semiconductor pattern and spaced apart from the substrate, and a field insulating film on the substrate. The insulating film may cover at least a part of a side wall of the first semiconductor pattern. The first antioxidant pattern may include a first semiconductor material film doped with a first impurity.

公开(公告)号：US11121064B2

公开(公告)日：2021-09-14

申请号：US16819318

申请日：2020-03-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Ho Park ,  Da Hye Kim ,  Jin-Woo Park ,  Jae Gwon Jang

IPC: H01L23/495 ,  H01L23/498 ,  H01L23/31

Abstract: A semiconductor package having a redistribution structure including a first face and a second face and a first semiconductor chip mounted on the first face. The semiconductor package may further include a first redistribution pad exposed from the second face of the redistribution structure and a second redistribution pad exposed from the second face of the redistribution structure. The semiconductor package may further include a first solder ball being in contact with the first redistribution pad and a second solder ball being in contact with the second redistribution pad. In some embodiments, a first distance of the first redistribution pad is smaller than a second distance of the second redistribution pad, the first and second distances are measured with respect to a reference plane that intersects a lower portion of the first solder ball and a lower portion of the second solder ball.