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    Methods of fabricating semiconductor devices including fin-shaped active regions
    1.
    发明授权
    Methods of fabricating semiconductor devices including fin-shaped active regions 有权
    制造半导体器件的方法包括鳍状有源区

    公开(公告)号：US09305825B2

    公开(公告)日：2016-04-05

    申请号：US14175212

    申请日：2014-02-07

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Young-sang Youn ,  Myung-geun Song ,  Ji-hoon Cha ,  Jae-jik Baek ,  Bo-un Yoon ,  Jeong-nam Han

    IPC: H01L21/76 ,  H01L21/762 ,  H01L21/8234 ,  H01L21/84

    CPC classification number: H01L21/76229 ,  H01L21/2652 ,  H01L21/763 ,  H01L21/823431 ,  H01L21/823481 ,  H01L21/845 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/0657

    Abstract: A method of manufacturing a semiconductor device includes forming a plurality of fins by forming a plurality of first device isolating trenches repeated at a first pitch in a substrate, forming a plurality of fin-type active areas protruding from a top surface of a first device isolating layer by forming the first device isolating layer in the plurality of first device isolating trenches, forming a plurality of second device isolating trenches at a pitch different from the first pitch by etching a portion of the substrate and the first device isolating layer, and forming a second device isolating layer in the plurality of second device isolating trenches, so as to form a plurality of fin-type active area groups separated from each other with the second device isolating layer therebetween.

    Abstract translation: 一种制造半导体器件的方法包括：通过在衬底中形成以第一间距重复的多个第一器件隔离沟槽来形成多个鳍片，形成从第一器件隔离的顶表面突出的多个翅片型有源区域 通过在所述多个第一器件隔离沟槽中形成所述第一器件隔离层，通过蚀刻所述衬底和所述第一器件隔离层的一部分来形成以与所述第一间距不同的间距隔离沟槽的多个第二器件， 在所述多个第二器件隔离沟槽中的第二器件隔离层，以便形成彼此分离的多个鳍式有源区域组，其间具有第二器件隔离层。

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    4.
    发明申请
    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
    制造半导体器件的方法

    公开(公告)号：US20150056795A1

    公开(公告)日：2015-02-26

    申请号：US14445284

    申请日：2014-07-29

    Applicant: SAMSUNG ELECTRONICS CO., LTD

    Inventor： Bo-kyeong Kang ,  Bo-un Yoon ,  Il-young Yoon ,  Jae-kwang Choi ,  Ho-young Kim ,  Se-jung Park ,  Jae-seok Kim

    IPC: H01L29/66 ,  H01L21/321 ,  H01L21/3213 ,  H01L21/28

    CPC classification number: H01L29/66795 ,  H01L21/28008 ,  H01L21/32115 ,  H01L21/3212 ,  H01L21/32136 ,  H01L21/32139 ,  H01L29/785

    Abstract: A method of manufacturing a semiconductor devices includes providing a semiconductor substrate that includes a channel region. The method includes forming a gate electrode material film including a stepped portion on the channel region. A sacrificial material film that has an etch selectivity that is the same as an etch selectivity of the gate electrode material film is formed. The sacrificial material film is planarized until a top surface of the gate electrode material film is exposed. The stepped portion is reduced by removing an exposed portion of the gate electrode material film.

    Abstract translation: 制造半导体器件的方法包括提供包括沟道区的半导体衬底。 该方法包括在沟道区上形成包括阶梯部分的栅电极材料膜。 形成具有与栅电极材料膜的蚀刻选择性相同的蚀刻选择性的牺牲材料膜。 将牺牲材料膜平坦化，直到露出栅电极材料膜的顶表面。 通过去除栅电极材料膜的暴露部分来减小阶梯部分。

    Slurry composition for chemical mechanical polishing, method of preparing the same, and method of fabricating semiconductor device by using the same
    5.
    发明授权
    Slurry composition for chemical mechanical polishing, method of preparing the same, and method of fabricating semiconductor device by using the same 有权

    公开(公告)号：US10829690B2

    公开(公告)日：2020-11-10

    申请号：US16502164

    申请日：2019-07-03

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Bo-yun Kim ,  Kenji Takai ,  Do-yoon Kim ,  Sang-kyun Kim ,  Bo-un Yoon

    IPC: C09K13/00 ,  C09G1/06 ,  H01L21/321 ,  H01L29/66 ,  H01L21/28

    Abstract: Disclosed is a slurry composition for chemical mechanical polishing (CMP) includes, as polishing particles, a complex compound of both fullerenol and alkylammonium hydroxide. The slurry composition, which exhibits excellent polishing properties, may be prepared at low cost in large quantities. Also disclosed is a method of preparing the slurry composition comprising obtaining a mixture of a fullerenol complex compound and unreacted hydrogen peroxide by reacting alkylammonium hydroxide, hydrogen peroxide, and fullerene, removing the unreacted hydrogen peroxide by adding hydrogen peroxide decomposition catalyst particles to the mixture, separating the hydrogen peroxide decomposition catalyst particles from the mixture by filtration, and adding a polishing additive to the mixture. Further disclosed is a method of fabricating a semiconductor device that includes providing a pattern defining a trench, forming a metal material film on the pattern to fill the trench, and performing CMP of the metal material film using the slurry composition.

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    7.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20170077103A1

    公开(公告)日：2017-03-16

    申请号：US15202874

    申请日：2016-07-06

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hye-sung Park ,  ln-seak Hwang ,  Bo-un Yoon ,  Byoung-ho Kwon ,  Jong-hyuk Park ,  Jae-hee Kim ,  Myung-jae Jang

    IPC: H01L27/108

    CPC classification number: H01L27/10852 ,  H01L27/10814 ,  H01L27/10894 ,  H01L27/10897 ,  H01L28/90

    Abstract: A method of manufacturing a semiconductor device includes: preparing a wafer in which a first cell area and a second cell area are defined; forming a bottom electrode structure in the first cell area and a dummy structure located in the second cell area; and sequentially forming a dielectric layer and a top electrode on the bottom electrode structure and the dummy structure, wherein the bottom electrode structure includes a plurality of bottom electrodes extending in a first direction in the first cell area and first and second supporters to support the plurality of bottom electrodes, wherein the dummy structure includes a first mold film, a first supporter film, a second mold film, and a second supporter film that are sequentially formed to cover the second cell area, and the second supporter and the second supporter film are at a same level relative to the wafer.

    Abstract translation: 制造半导体器件的方法包括：制备其中限定了第一单元区域和第二单元区域的晶片; 在所述第一单元区域中形成底部电极结构，以及位于所述第二单元区域中的虚设结构; 并且在所述底部电极结构和所述虚拟结构上顺序地形成电介质层和顶部电极，其中所述底部电极结构包括在所述第一电池区域中沿第一方向延伸的多个底部电极以及支撑所述多个电极的所述第一和第二支撑件 的底部电极，其中所述虚拟结构包括依次形成以覆盖所述第二电池区域的第一模制膜，第一支撑膜，第二模制膜和第二支撑膜，并且所述第二支撑件和所述第二支撑膜为 在相同的水平相对于晶片。

    Semiconductor device and method of manufacturing the same
    9.
    发明授权
    Semiconductor device and method of manufacturing the same 有权

    公开(公告)号：US10109529B2

    公开(公告)日：2018-10-23

    申请号：US15185253

    申请日：2016-06-17

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Young-ho Koh ,  Byoung-ho Kwon ,  Yang-hee Lee ,  Young-kuk Kim ,  In-seak Hwang ,  Bo-un Yoon

    IPC: H01L29/423 ,  H01L21/8234 ,  H01L27/108

    Abstract: A semiconductor device including a direct contact and a bit line in a cell array region and a gate electrode structure in a peripheral circuit region, and a method of manufacturing the semiconductor device are provided. The semiconductor device includes a substrate including a cell array region including a first active region and a peripheral circuit region including a second active region, a first insulating layer on the substrate, the first insulating layer including contact holes exposing the first active region, a direct contact in the contact holes, wherein a direct contact is connected to the first active region, a bit line connected to the direct contact in the cell array region and extending in a first direction, and a gate insulating layer and a gate electrode structure, wherein a dummy conductive layer including substantially the same material as the direct contact is in the peripheral circuit region.

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