Display device and method of manufacturing the same
    1.
    发明授权
    Display device and method of manufacturing the same 有权
    显示装置及其制造方法

    公开(公告)号:US08912027B2

    公开(公告)日:2014-12-16

    申请号:US13733820

    申请日:2013-01-03

    摘要: A display device according to an exemplary embodiment of the present invention includes a semiconductor layer; a data line disposed on the semiconductor layer, and a source electrode as well as a drain electrode disposed on the semiconductor layer and facing the source electrode. The semiconductor layer is made of an oxide semiconductor including indium, tin, and zinc. An atomic percent of indium in the oxide semiconductor is equal to or larger than about 10 at % and equal to or smaller than about 90 at %, an atomic percent of zinc in the oxide semiconductor is equal to or larger than about 5 at % and equal to or smaller than about 60 at %, and an atomic percent of tin in the oxide semiconductor is equal to or larger than about 5 at % and equal to or smaller than about 45 at %, and the data line and the drain electrode comprise copper.

    摘要翻译: 根据本发明的示例性实施例的显示装置包括半导体层; 设置在半导体层上的数据线,以及设置在半导体层上并面向源电极的源电极以及漏电极。 半导体层由包括铟,锡和锌的氧化物半导体制成。 氧化物半导体中的铟的原子百分比等于或大于约10原子%且等于或小于约90原子%,氧化物半导体中的锌的原子百分比等于或大于约5原子%,以及 等于或小于约60at%,并且氧化物半导体中的锡的原子百分比等于或大于约5at%且等于或小于约45at%,并且数据线和漏电极包括 铜。

    LIQUID CRYSTAL DISPLAY AND METHOD OF FABRICATING THE SAME
    3.
    发明申请
    LIQUID CRYSTAL DISPLAY AND METHOD OF FABRICATING THE SAME 有权
    液晶显示器及其制造方法

    公开(公告)号:US20150206818A1

    公开(公告)日:2015-07-23

    申请号:US14268879

    申请日:2014-05-02

    摘要: A liquid crystal display and a method of fabricating a liquid crystal display (LCD), the LCD including a substrate; gate wiring including a gate pad, a gate electrode, and a gate line, which are formed on the substrate; a gate insulating layer disposed on the gate wiring; an electrode pattern including a connecting electrode, which is disposed on the gate insulating layer and is electrically connected to the gate pad, a source electrode and a drain electrode, which partially overlap the gate electrode; a pixel electrode, which is electrically connected to the drain electrode; a data line, which intersects the gate line; a semiconductor layer disposed on the gate electrode; first auxiliary wiring overlapping the data line and spaced from the semiconductor layer; and second auxiliary wiring overlapping the gate line.

    摘要翻译: 液晶显示器和制造液晶显示器(LCD)的方法,所述LCD包括基板; 栅极布线,包括形成在基板上的栅极焊盘,栅电极和栅极线; 设置在栅极布线上的栅极绝缘层; 电极图案,其包括设置在所述栅极绝缘层上并与所述栅极焊盘电连接的连接电极,所述栅电极部分地重叠的源电极和漏电极; 与漏电极电连接的像素电极; 与栅极线相交的数据线; 设置在所述栅电极上的半导体层; 第一辅助布线与数据线重叠并与半导体层间隔开; 并且第二辅助配线与栅极线重叠。

    Liquid crystal display and method of fabricating the same
    4.
    发明授权
    Liquid crystal display and method of fabricating the same 有权
    液晶显示器及其制造方法

    公开(公告)号:US09496063B2

    公开(公告)日:2016-11-15

    申请号:US14268879

    申请日:2014-05-02

    摘要: A liquid crystal display and a method of fabricating a liquid crystal display (LCD), the LCD including a substrate; gate wiring including a gate pad, a gate electrode, and a gate line, which are formed on the substrate; a gate insulating layer disposed on the gate wiring; an electrode pattern including a connecting electrode, which is disposed on the gate insulating layer and is electrically connected to the gate pad, a source electrode and a drain electrode, which partially overlap the gate electrode; a pixel electrode, which is electrically connected to the drain electrode; a data line, which intersects the gate line; a semiconductor layer disposed on the gate electrode; first auxiliary wiring overlapping the data line and spaced from the semiconductor layer; and second auxiliary wiring overlapping the gate line.

    摘要翻译: 液晶显示器和制造液晶显示器(LCD)的方法,所述LCD包括基板; 栅极布线,包括形成在基板上的栅极焊盘,栅电极和栅极线; 设置在栅极布线上的栅极绝缘层; 电极图案,其包括设置在所述栅极绝缘层上并与所述栅极焊盘电连接的连接电极,所述栅电极部分地重叠的源电极和漏电极; 与漏电极电连接的像素电极; 与栅极线相交的数据线; 设置在所述栅电极上的半导体层; 第一辅助布线与数据线重叠并与半导体层间隔开; 并且第二辅助配线与栅极线重叠。

    Thin film transistor array panel
    5.
    发明授权

    公开(公告)号:US09245906B2

    公开(公告)日:2016-01-26

    申请号:US14795431

    申请日:2015-07-09

    IPC分类号: H01L29/10 H01L27/12

    摘要: A thin film transistor array panel includes: a gate line disposed on a substrate and including a gate electrode, a semiconductor layer including an oxide semiconductor disposed on the substrate, and a data wire layer disposed on the substrate and including a data line intersecting the gate line, a source electrode connected to the data line, and a drain electrode facing the source electrode. In addition, at least one of the data line, the source electrode or the drain electrode of the data wire layer includes a barrier layer and a main wiring layer disposed on the barrier layer. The main wiring layer includes copper or a copper alloy. Also, the barrier layer includes a metal oxide, and the metal oxide includes zinc.

    Thin film transistor array panel having double-layered oxide semiconductor structure and method for manufacturing the same
    6.
    发明授权
    Thin film transistor array panel having double-layered oxide semiconductor structure and method for manufacturing the same 有权
    具有双层氧化物半导体结构的薄膜晶体管阵列面板及其制造方法

    公开(公告)号:US09209313B2

    公开(公告)日:2015-12-08

    申请号:US14291535

    申请日:2014-05-30

    摘要: A thin film transistor array panel includes: a gate line including a gate electrode; a first gate insulating layer on the gate line; a semiconductor layer on the first gate insulating layer and overlapping the gate electrode; a second gate insulating layer on the semiconductor layer and the first gate insulating layer, and an opening in the second gate insulating layer and through which the semiconductor layer is exposed; drain and source electrodes on the second gate insulating and semiconductor layers and facing each other; a first field generating electrode; and a second field generating electrode connected to the drain electrode. The semiconductor layer includes an oxide semiconductor layer, and first and second auxiliary layers on the oxide semiconductor layer and separated from each other. An edge of the drain and source electrodes is disposed inside an edge of the first and second auxiliary layers, respectively.

    摘要翻译: 薄膜晶体管阵列面板包括:栅极线,包括栅电极; 栅极线上的第一栅极绝缘层; 在所述第一栅极绝缘层上的半导体层,并且与所述栅电极重叠; 在所述半导体层和所述第一栅极绝缘层上的第二栅极绝缘层和所述第二栅极绝缘层中的所述半导体层暴露的开口; 第二栅绝缘层和半导体层上的漏极和源极彼此面对; 第一场产生电极; 以及连接到漏电极的第二场产生电极。 半导体层包括氧化物半导体层,以及氧化物半导体层上的第一和第二辅助层,并且彼此分离。 漏极和源电极的边缘分别设置在第一和第二辅助层的边缘的内侧。

    THIN FILM TRANSISTOR ARRAY PANEL
    7.
    发明申请

    公开(公告)号:US20130299817A1

    公开(公告)日:2013-11-14

    申请号:US13660362

    申请日:2012-10-25

    IPC分类号: H01L29/786

    摘要: A thin film transistor array panel includes: a gate line disposed on a substrate and including a gate electrode, a semiconductor layer including an oxide semiconductor disposed on the substrate, and a data wire layer disposed on the substrate and including a data line intersecting the gate line, a source electrode connected to the data line, and a drain electrode facing the source electrode. In addition, at least one of the data line, the source electrode or the drain electrode of the data wire layer includes a barrier layer and a main wiring layer disposed on the barrier layer. The main wiring layer includes copper or a copper alloy. Also, the barrier layer includes a metal oxide, and the metal oxide includes zinc.

    Thin film transistor array panel having improved aperture ratio and method of manufacturing same
    8.
    发明授权
    Thin film transistor array panel having improved aperture ratio and method of manufacturing same 有权
    具有改善孔径比的薄膜晶体管阵列面板及其制造方法

    公开(公告)号:US09142680B2

    公开(公告)日:2015-09-22

    申请号:US13725333

    申请日:2012-12-21

    摘要: A thin film transistor array panel according to an exemplary embodiment of the present invention includes: a substrate; a gate line positioned on the substrate; a gate insulating layer positioned on the gate line; a semiconductor layer positioned on the gate insulating layer and having a channel portion; a data line including a source electrode and a drain electrode, the source and drain electrodes both positioned on the semiconductor layer; a passivation layer positioned on the data line and the drain electrode and having a contact hole formed therein; and a pixel electrode positioned on the passivation layer, wherein the pixel electrode contacts the drain electrode within the contact hole, and the channel portion of the semiconductor layer and the contact hole both overlap the gate line in a plan view of the substrate.

    摘要翻译: 根据本发明的示例性实施例的薄膜晶体管阵列面板包括:基板; 位于基板上的栅极线; 位于栅极线上的栅极绝缘层; 位于所述栅极绝缘层上且具有沟道部分的半导体层; 包括源电极和漏电极的数据线,所述源极和漏极都位于所述半导体层上; 位于数据线和漏电极上并具有形成在其中的接触孔的钝化层; 位于所述钝化层上的像素电极,其中所述像素电极在所述接触孔内接触所述漏电极,并且所述半导体层的沟道部分和所述接触孔在所述衬底的平面图中与所述栅极线重叠。

    Thin film transistor array panel
    9.
    发明授权
    Thin film transistor array panel 有权
    薄膜晶体管阵列面板

    公开(公告)号:US09099438B2

    公开(公告)日:2015-08-04

    申请号:US13660362

    申请日:2012-10-25

    摘要: A thin film transistor array panel includes: a gate line disposed on a substrate and including a gate electrode, a semiconductor layer including an oxide semiconductor disposed on the substrate, and a data wire layer disposed on the substrate and including a data line intersecting the gate line, a source electrode connected to the data line, and a drain electrode facing the source electrode. In addition, at least one of the data line, the source electrode or the drain electrode of the data wire layer includes a barrier layer and a main wiring layer disposed on the barrier layer. The main wiring layer includes copper or a copper alloy. Also, the barrier layer includes a metal oxide, and the metal oxide includes zinc.

    摘要翻译: 薄膜晶体管阵列面板包括:栅极线,设置在基板上并且包括栅电极,包括设置在基板上的氧化物半导体的半导体层以及设置在基板上的数据线层,并且包括与栅极交叉的数据线 线,连接到数据线的源电极和面对源电极的漏电极。 此外,数据线层的数据线,源电极或漏电极中的至少一个包括阻挡层和设置在阻挡层上的主配线层。 主配线层包括铜或铜合金。 此外,阻挡层包括金属氧化物,并且金属氧化物包括锌。