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    System and method for clock resynchronization
    1.
    发明授权
    System and method for clock resynchronization 有权

    公开(公告)号：US11962677B2

    公开(公告)日：2024-04-16

    申请号：US17720087

    申请日：2022-04-13

    Applicant: STMicroelectronics S.r.l.

    Inventor： Francesco Pappalardo ,  Elena Salurso

    IPC: H04L7/033 ,  H03L7/06 ,  H04L7/00

    CPC classification number: H04L7/0331 ,  H03L7/06 ,  H04L7/0016 ,  H04L7/0054 ,  H04L7/0079

    Abstract: A method of processing a data stream includes taking a first number of samples of the data stream using a sampling clock over a first observation window and storing a stored data stream including the first number of samples in a data buffer. A length of the first observation window is determined by a reference clock. A measured number of cycles of the sampling clock are determined from the first number of samples. An error between an expected number of cycles of the sampling clock and the measured number of cycles of the sampling clock in the observation window is measured. The stored data stream corresponding to the first observation window is updated to contain a second number of samples by correcting the first number of samples with the error.

    RECEIVER CIRCUIT, RELATED INTEGRATED CIRCUIT AND APPARATUS
    4.
    发明申请
    RECEIVER CIRCUIT, RELATED INTEGRATED CIRCUIT AND APPARATUS 审中-公开

    公开(公告)号：US20180019946A1

    公开(公告)日：2018-01-18

    申请号：US15334070

    申请日：2016-10-25

    Applicant: STMICROELECTRONICS S.R.L.

    Inventor： Francesco Pappalardo ,  Giuseppe Notarangelo

    IPC: H04L12/741 ,  H04L1/00 ,  H04L29/06 ,  H04W52/02

    CPC classification number: H04L45/745 ,  H04L1/0053 ,  H04L1/0061 ,  H04L1/0078 ,  H04L69/22 ,  H04W52/0229 ,  Y02D70/00

    Abstract: A receiver circuit extracts data from a serial data signal. The serial data signal contains a data packet having a first format with a first number of bits or a second format with a second number of bits based on a selection signal. The second format comprises the bits of the first format followed by one or more additional bits. The receiver circuit has at least one shift register having a total number of bits equal or greater than the number of bits of the second format and a switching circuit that selectively connects the serial data signal to one of the shift register serial inputs as a function of the selection signal. When the first format is selected and the respective bits received, the bits are stored in given positions of the one or more shift registers. The switching circuit also, when the second format is selected and the respective bits received, stores the bits of the first format included at the beginning of the second format in the same given positions of the one or more shift registers.

    CAPACITIVE PRESSURE SENSOR FOR MONITORING CONSTRUCTION STRUCTURES, PARTICULARLY MADE OF CONCRETE
    5.
    发明申请
    CAPACITIVE PRESSURE SENSOR FOR MONITORING CONSTRUCTION STRUCTURES, PARTICULARLY MADE OF CONCRETE 审中-公开

    公开(公告)号：US20190011320A1

    公开(公告)日：2019-01-10

    申请号：US16023918

    申请日：2018-06-29

    Applicant: STMicroelectronics S.r.l.

    Inventor： Francesco Pappalardo ,  Agatino Pennisi ,  Elio Guidetti ,  Angelo Doriani

    IPC: G01L9/00 ,  G01L19/00

    Abstract: A capacitive sensor for monitoring stresses acting in a construction structure and having a multi-layer structure provided with an upper conductive layer defining an upper outer surface of the sensor. A lower conductive layer defines a lower outer surface. At least a first structural layer of insulating material is in contact with the upper conductive layer and at least a second structural layer of insulating material is in contact with the lower conductive layer. At least a first plate layer of conductive material and at least a second plate layer, of conductive material, and at least one dielectric layer is interposed between the first plate layer and the second plate layer to define at least one detection capacitor inside the multi-layer structure of the sensor. The upper and lower conductive layers jointly defining an electromagnetic screen for screening the detection capacitor against electromagnetic interference originating from outside the capacitive sensor.

    Capacitive pressure sensor for monitoring construction structures, particularly made of concrete
    6.
    发明授权
    Capacitive pressure sensor for monitoring construction structures, particularly made of concrete 有权

    公开(公告)号：US10914647B2

    公开(公告)日：2021-02-09

    申请号：US16023918

    申请日：2018-06-29

    Applicant: STMicroelectronics S.r.l.

    Inventor： Francesco Pappalardo ,  Agatino Pennisi ,  Elio Guidetti ,  Angelo Doriani

    IPC: G01L1/00 ,  G01L9/00 ,  G01M5/00 ,  G01L1/14 ,  G01L19/00 ,  G01N33/38

    Abstract: A capacitive sensor for monitoring stresses acting in a construction structure and having a multi-layer structure provided with an upper conductive layer defining an upper outer surface of the sensor. A lower conductive layer defines a lower outer surface. At least a first structural layer of insulating material is in contact with the upper conductive layer and at least a second structural layer of insulating material is in contact with the lower conductive layer. At least a first plate layer of conductive material and at least a second plate layer, of conductive material, and at least one dielectric layer is interposed between the first plate layer and the second plate layer to define at least one detection capacitor inside the multi-layer structure of the sensor. The upper and lower conductive layers jointly defining an electromagnetic screen for screening the detection capacitor against electromagnetic interference originating from outside the capacitive sensor.

    Receiver circuit, related integrated circuit and apparatus
    8.
    发明授权
    Receiver circuit, related integrated circuit and apparatus 有权

    公开(公告)号：US10135733B2

    公开(公告)日：2018-11-20

    申请号：US15334070

    申请日：2016-10-25

    Applicant: STMICROELECTRONICS S.R.L.

    Inventor： Francesco Pappalardo ,  Giuseppe Notarangelo

    IPC: H04L12/741 ,  H04L1/00 ,  H04L29/06 ,  H04W52/02

    Abstract: A receiver circuit extracts data from a serial data signal. The serial data signal contains a data packet having a first format with a first number of bits or a second format with a second number of bits based on a selection signal. The second format comprises the bits of the first format followed by one or more additional bits. The receiver circuit has at least one shift register having a total number of bits equal or greater than the number of bits of the second format and a switching circuit that selectively connects the serial data signal to one of the shift register serial inputs as a function of the selection signal. When the first format is selected and the respective bits received, the bits are stored in given positions of the one or more shift registers. The switching circuit also, when the second format is selected and the respective bits received, stores the bits of the first format included at the beginning of the second format in the same given positions of the one or more shift registers.

    Monitoring device with jumper cable coupling and related methods
    9.
    发明授权
    Monitoring device with jumper cable coupling and related methods 有权

    公开(公告)号：US09678027B2

    公开(公告)日：2017-06-13

    申请号：US14670613

    申请日：2015-03-27

    Applicant: STMICROELECTRONICS S.r.l.

    Inventor： Giovanni Girlando ,  Michele Calabretta ,  Francesco Pappalardo

    IPC: G01N27/20 ,  G01N27/00 ,  G01M5/00 ,  H04Q9/00

    CPC classification number: G01N27/02 ,  G01M5/0033 ,  G01M5/0083 ,  G01N27/00 ,  H04Q9/00 ,  H04Q2209/88

    Abstract: A monitoring device is for a block of building material. The monitoring device may include an electric supply line configured to be buried in the block of building material and having a flexible main cable, and flexible jumper cables coupled to the flexible main cable and extending outwardly. The monitoring device may include sensor devices configured to be buried in the block of building material and coupled to respective ones of the flexible jumper cables. Each sensor device may include a primary inductor coupled to the electric supply line at a position based upon peaks of a stationary waveform when the electric supply line is alternating current (AC) powered, and a monitoring circuit. The monitoring circuit may include an integrated sensor, and a secondary inductor magnetically coupled to the primary inductor and configured to supply the integrated sensor, and communicate through the electric supply line.

    SYSTEM AND METHOD FOR CLOCK RESYNCHRONIZATION
    10.
    发明公开
    SYSTEM AND METHOD FOR CLOCK RESYNCHRONIZATION 审中-公开

    公开(公告)号：US20230336325A1

    公开(公告)日：2023-10-19

    申请号：US17720087

    申请日：2022-04-13

    Applicant: STMicroelectronics S.r.l.

    Inventor： Francesco Pappalardo ,  Elena Salurso

    IPC: H04L7/033 ,  H03L7/06

    CPC classification number: H04L7/0331 ,  H03L7/06

    Abstract: A method of processing a data stream includes taking a first number of samples of the data stream using a sampling clock over a first observation window and storing a stored data stream including the first number of samples in a data buffer. A length of the first observation window is determined by a reference clock. A measured number of cycles of the sampling clock are determined from the first number of samples. An error between an expected number of cycles of the sampling clock and the measured number of cycles of the sampling clock in the observation window is measured. The stored data stream corresponding to the first observation window is updated to contain a second number of samples by correcting the first number of samples with the error.

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