公开(公告)号：US11004517B2

公开(公告)日：2021-05-11

申请号：US16356182

申请日：2019-03-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunjung Lee ,  Chanha Kim ,  Suk-eun Kang ,  Seungkyung Ro ,  Kwangwoo Lee ,  Juwon Lee ,  Jinwook Lee ,  Heewon Lee

IPC: G11C16/04 ,  G11C16/26 ,  G11C16/34 ,  G06F3/06 ,  G06F11/10 ,  G11C29/52 ,  G11C11/56

Abstract: A storage device includes a nonvolatile memory device including a memory block and a memory controller. The memory block includes a first memory region connected with a first word line and a second memory region connected with a second word line. The memory controller sets a read block voltage based on a first read voltage of the first memory region. The memory controller determines a second read voltage of the second memory region based on variation information and the read block voltage.

公开(公告)号：US20200058359A1

公开(公告)日：2020-02-20

申请号：US16356182

申请日：2019-03-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunjung Lee ,  Chanha Kim ,  Suk-eun Kang ,  Seungkyung Ro ,  Kwangwoo Lee ,  Juwon Lee ,  Jinwook Lee ,  Heewon Lee

IPC: G11C16/26 ,  G11C16/34 ,  G06F3/06 ,  G06F11/10 ,  G11C29/52

Abstract: A storage device includes a nonvolatile memory device including a memory block and a memory controller. The memory block includes a first memory region connected with a first word line and a second memory region connected with a second word line. The memory controller sets a read block voltage based on a first read voltage of the first memory region. The memory controller determines a second read voltage of the second memory region based on variation information and the read block voltage.

公开(公告)号：US12020759B2

公开(公告)日：2024-06-25

申请号：US17878019

申请日：2022-07-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun-Ho Seo ,  Juwon Lee ,  Suk-Eun Kang ,  Dogyeong Lee ,  Youngwook Jeong ,  Sang-Hyun Joo

IPC: G11C16/34 ,  G06N3/08 ,  G11C11/56 ,  G11C16/04 ,  G11C16/10 ,  G11C16/16 ,  G11C16/24

CPC classification number: G11C16/3459 ,  G06N3/08 ,  G11C11/5628 ,  G11C11/5635 ,  G11C11/5671 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/16 ,  G11C16/24 ,  G11C16/3495

Abstract: An operation method of a nonvolatile memory device includes performing a 1-stage program step and a 1-stage verify step on a first word line, storing a first time stamp, performing the 1-stage program step and the 1-stage verify step on a second word line, storing a second time stamp, calculating a delay time based on the first time stamp and the second time stamp, determining whether the delay time is greater than a threshold value, adjusting at least one 2-stage verify voltage associated with the first word line from a first voltage level to a second voltage level based on the delay time, and performing a 2-stage program step and a 2-stage verify step on the first word line. A level of the at least one 1-stage verify voltage is lower than the second voltage level, and the second voltage level is lower than the first voltage level.

公开(公告)号：US12068047B2

公开(公告)日：2024-08-20

申请号：US17535771

申请日：2021-11-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sukeun Kang ,  Junho Seo ,  Dogyeong Lee ,  Juwon Lee

IPC: G11C16/34 ,  G11C16/08 ,  G11C16/10 ,  G11C16/14 ,  G11C16/28

CPC classification number: G11C16/3495 ,  G11C16/08 ,  G11C16/102 ,  G11C16/14 ,  G11C16/28

Abstract: An operating method of a memory system includes storing normal data to a first storage area of a non-volatile memory in a first program mode among multiple program modes defined according to a number of bits stored in each memory cell; storing dummy data in the first storage area in at least one of the multiple program modes including the first program mode; and copying the normal data from the first storage area to a second storage area of the non-volatile memory based on dummy data stored in the first program mode.