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1.发明授权公开(公告)号：US09384201B2
公开(公告)日：2016-07-05
申请号：US13904493
申请日：2013-05-29
IPC分类号： G06F17/30
CPC分类号： G06F17/30091 , G06F17/3012 , G06F17/30138 , G06F17/30227
摘要： A method of managing data of a file system using a database management system is provided. According to the method, the metadata of the file system is managed using a database management system (DBMS), but writing data to or reading data from a disk is directly performed by the file system according to the method directly performed not through other file systems or DBMSs. In this way, stable transactions are guaranteed for a user, and the user can design a disk allocation algorithm optimized with respect to a multimedia environment.
摘要翻译： 提供了一种使用数据库管理系统管理文件系统的数据的方法。 根据该方法，使用数据库管理系统（DBMS）来管理文件系统的元数据，但是根据直接不通过其他文件系统执行的方法，直接由文件系统执行向磁盘写入数据或从磁盘读取数据 或DBMS。 以这种方式，用户可以保证稳定的交易，并且用户可以设计针对多媒体环境优化的磁盘分配算法。
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公开(公告)号：US09905561B2
公开(公告)日：2018-02-27
申请号：US15409523
申请日：2017-01-18
发明人： Ha-young Kim , Sung-we Cho , Tae-joong Song , Sang-hoon Baek
IPC分类号： H01L23/52 , H01L27/092 , H01L23/522 , H01L23/528 , H01L27/02 , G06F17/50
CPC分类号： H01L27/0924 , G06F17/5077 , H01L23/5226 , H01L23/528 , H01L23/5286 , H01L27/0207 , H01L27/092
摘要： An embodiment includes an integrated circuit comprising a standard cell, the standard cell comprising: first and second active regions having different conductivity types and extending in a first direction; first, second, and third conductive lines extending over the first and second active regions in a second direction substantially perpendicular to the first direction, and disposed parallel to each other; and a cutting layer extending in the first direction between the first and second active regions and separating the first conductive line into a first upper conductive line and a first lower conductive line, the second conductive line into a second upper conductive line and a second lower conductive line, and the third conductive line into a third upper conductive line and a third lower conductive line; wherein: the first upper conductive line and the third lower conductive line are electrically connected together; and the second upper conductive line and the second lower conductive line are electrically connected together.
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公开(公告)号：US09665678B2
公开(公告)日：2017-05-30
申请号：US14744178
申请日：2015-06-19
发明人： Sung-we Cho , Dal-hee Lee , Ha-young Kim , Jae-woo Seo , Jin-tae Kim
IPC分类号： G06F17/50
CPC分类号： G06F17/5072 , G06F17/505
摘要： A method of designing an integrated circuit includes a processor receiving input data initially-defining the integrated circuit using a plurality of first standard cells designed to optimize a performance or yield characteristic. The processor substitutes at least one second standard cell designed to optimize a different performance or yield characteristic from that for which the first standard cells were optimized for a corresponding one of the first standard cells. The processor generates output data defining the integrated circuit including the second standard cell. The substituted second standard cell has the same function as the corresponding first standard cell for which it was substituted.
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公开(公告)号：US11239151B2
公开(公告)日：2022-02-01
申请号：US16886020
申请日：2020-05-28
发明人： In-gyum Kim , Ha-young Kim , Tae-joong Song , Jong-hoon Jung , Gi-young Yang , Jin-young Lim
IPC分类号： H01L23/50 , H01L29/788 , H01L23/528 , H01L27/02 , H01L27/118 , H01L23/498
摘要： A standard cell of an IC includes a cell area including a transistor configured to determine a function of the standard cell; a first dummy area and a second dummy area respectively adjacent to two sides of the cell area in a first direction; and an active area extending in the first direction across the cell area, the first dummy area, and the second dummy area. The active area includes a first active area and a second active area spaced apart from each other in a second direction perpendicular to the first direction and extend parallel to each other in the first direction. At least one of the first active area and the second active area provided in the first dummy area is biased, and at least one of the first active area and the second active area provided in the second dummy area is biased.
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公开(公告)号：US10354947B2
公开(公告)日：2019-07-16
申请号：US15871206
申请日：2018-01-15
发明人： In-gyum Kim , Ha-young Kim , Tae-joong Song , Jong-hoon Jung , Gi-young Yang , Jin-young Lim
IPC分类号： H01L23/50 , H01L29/788 , H01L23/528 , H01L27/02 , H01L27/118 , H01L23/498
摘要： An integrated circuit (IC) may include a plurality of standard cells. At least one standard cell of the plurality of standard cells may include a power rail configured to supply power to the at least one standard cell, the power rail extending in a first direction, a cell area including at least one transistor configured to determine a function of the at least one standard cell, a first dummy area and a second dummy area respectively adjacent to two sides of the cell area in the first direction, and an active area extending in the first direction across the cell area, the first dummy area, and the second dummy area. A region of the active area, which is included in the first dummy area or the second dummy area, is electrically connected to the power rail.
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公开(公告)号：US10672702B2
公开(公告)日：2020-06-02
申请号：US16433092
申请日：2019-06-06
发明人： In-gyum Kim , Ha-young Kim , Tae-joong Song , Jong-hoon Jung , Gi-young Yang , Jin-young Lim
IPC分类号： H01L23/50 , H01L29/788 , H01L23/528 , H01L27/02 , H01L27/118 , H01L23/498
摘要： A standard cell of an IC includes a cell area including a transistor configured to determine a function of the standard cell; a first dummy area and a second dummy area respectively adjacent to two sides of the cell area in a first direction; and an active area extending in the first direction across the cell area, the first dummy area, and the second dummy area. The active area includes a first active area and a second active area spaced apart from each other in a second direction perpendicular to the first direction and extend parallel to each other in the first direction. At least one of the first active area and the second active area provided in the first dummy area is biased, and at least one of the first active area and the second active area provided in the second dummy area is biased.
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公开(公告)号：US10651201B2
公开(公告)日：2020-05-12
申请号：US15913530
申请日：2018-03-06
发明人： Ha-young Kim , Chang-beom Kim , Hyun-jeong Roh , Tae-joong Song , Dal-hee Lee , Sung-we Cho
IPC分类号： H01L27/118 , H01L27/02
摘要： An integrated circuit includes a first conductive pattern in a first conductive layer, a second conductive pattern in a second conductive layer over the first conductive layer, and a via electrically connected with the first conductive pattern and the second conductive pattern to allow a first current flowing from the first conductive pattern to the second conductive pattern and a second current flowing from the second conductive pattern to the first conductive pattern to pass through at different times. The via is placed on the first conductive pattern so that a path of the first current does not overlap with a path of the second current in the first conductive pattern.
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公开(公告)号：US20160034627A1
公开(公告)日：2016-02-04
申请号：US14744178
申请日：2015-06-19
发明人： Sung-we Cho , Dal-hee Lee , Ha-young Kim , Jae-woo Seo , Jin-tae Kim
IPC分类号： G06F17/50
CPC分类号： G06F17/5072 , G06F17/505
摘要： A method of designing an integrated circuit includes a processor receiving input data initially-defining the integrated circuit using a plurality of first standard cells designed to optimize a performance or yield characteristic. The processor substitutes at least one second standard cell designed to optimize a different performance or yield characteristic from that for which the first standard cells were optimized for a corresponding one of the first standard cells. The processor generates output data defining the integrated circuit including the second standard cell. The substituted second standard cell has the same function as the corresponding first standard cell for which it was substituted.
摘要翻译： 一种设计集成电路的方法包括处理器，其使用设计成优化性能或产量特性的多个第一标准单元接收初始定义集成电路的输入数据。 处理器替代至少一个设计用于优化不同性能或产量特性的第二标准单元，其中针对第一标准单元对应的第一标准单元优化第一标准单元。 处理器产生定义包括第二标准单元的集成电路的输出数据。 取代的第二标准单元具有与其被替代的相应的第一标准单元相同的功能。
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公开(公告)号：US11201150B2
公开(公告)日：2021-12-14
申请号：US16746071
申请日：2020-01-17
发明人： Sang-Hoon Baek , Sun-Young Park , Sang-Kyu Oh , Ha-young Kim , Jung-Ho Do , Moo-Gyu Bae , Seung-Young Lee
IPC分类号： H01L23/48 , H01L29/40 , H01L27/088 , H01L27/02 , H01L27/11 , H01L21/84 , H01L27/12 , H01L21/8234 , H01L23/528
摘要： A system on chip includes first to third nanowires extending in a second direction, first to third gate lines respectively surrounding the first to third nanowires, each of the first to third gate lines extending in a first direction across the second direction, a gate isolation region cutting the first to third gate lines and extending in the second direction, a first gate contact formed on the second gate line arranged between the first gate line and the third gate line, and electrically connecting the cut second gate line, a second gate contact formed on the first gate line, a third gate contact formed on the third gate line, a first metal line electrically connecting the second gate contact and the third gate contact; and a second metal line electrically connected to the first gate contact.
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公开(公告)号：US11189639B2
公开(公告)日：2021-11-30
申请号：US16842867
申请日：2020-04-08
发明人： Ha-young Kim , Chang-beom Kim , Hyun-jeong Roh , Tae-joong Song , Dal-hee Lee , Sung-we Cho
IPC分类号： H01L27/118 , H01L27/02
摘要： An integrated circuit includes a first conductive pattern in a first conductive layer, a second conductive pattern in a second conductive layer over the first conductive layer, and a via electrically connected with the first conductive pattern and the second conductive pattern to allow a first current flowing from the first conductive pattern to the second conductive pattern and a second current flowing from the second conductive pattern to the first conductive pattern to pass through at different times. The via is placed on the first conductive pattern so that a path of the first current does not overlap with a path of the second current in the first conductive pattern.
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