公开(公告)号：US09899337B2

公开(公告)日：2018-02-20

申请号：US15174411

申请日：2016-06-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gun-ho Chang ,  Tae-je Cho ,  Jong-bo Shim

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L21/56 ,  H01L23/538

CPC classification number: H01L23/562 ,  H01L21/486 ,  H01L21/561 ,  H01L21/568 ,  H01L23/147 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/0557 ,  H01L2224/12105 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/27002 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/73259 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2224/83192 ,  H01L2224/92224 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2225/06582 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2224/83 ,  H01L2224/27 ,  H01L2924/00

Abstract: A semiconductor package includes a package member and a stress controlling layer. The package member includes an encapsulation layer and at least one chip. The encapsulation layer encapsulates the at least one chip. The stress controlling layer is disposed on a surface of the package member. The stress controlling layer has an internal stress to the extent that the stress controlling layer prevents the package member from having warpage.

公开(公告)号：US10026724B2

公开(公告)日：2018-07-17

申请号：US15444277

申请日：2017-02-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ji-hwang Kim ,  Jong-bo Shim ,  Sang-uk Han ,  Cha-jea Jo ,  Gun-ho Chang

IPC: H01L25/00 ,  H01L23/00 ,  H01L23/31 ,  H01L25/065

Abstract: A method of manufacturing a semiconductor package includes forming at least two partial package chip stacks, each partial package chip stack including at least two semiconductor chips each including a plurality of through substrate vias (TSVs), and including a first mold layer surrounding side surfaces of the at least two semiconductor chips, and sequentially mounting the at least two partial package chip stacks on a package substrate in a direction vertical to a top surface of the package substrate, such that the at least two partial package chip stacks include a first partial package chip stack and a second partial package chip stack directly connected to the first partial package chip stack.

公开(公告)号：US20180006006A1

公开(公告)日：2018-01-04

申请号：US15444277

申请日：2017-02-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ji-hwang Kim ,  Jong-bo Shim ,  Sang-uk Han ,  Cha-jea Jo ,  Gun-ho Chang

IPC: H01L25/00 ,  H01L25/065 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L25/50 ,  H01L23/3185 ,  H01L24/05 ,  H01L24/16 ,  H01L24/17 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/16146 ,  H01L2224/17181 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/06596 ,  H01L2225/1023 ,  H01L2225/1058

Abstract: A method of manufacturing a semiconductor package includes forming at least two partial package chip stacks, each partial package chip stack including at least two semiconductor chips each including a plurality of through substrate vias (TSVs), and including a first mold layer surrounding side surfaces of the at least two semiconductor chips, and sequentially mounting the at least two partial package chip stacks on a package substrate in a direction vertical to a top surface of the package substrate, such that the at least two partial package chip stacks include a first partial package chip stack and a second partial package chip stack directly connected to the first partial package chip stack.

公开(公告)号：US09761477B2

公开(公告)日：2017-09-12

申请号：US15286801

申请日：2016-10-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gun-ho Chang ,  Un-byoung Kang ,  Tae-je Cho

IPC: H01L21/78 ,  H01L21/683 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L23/36 ,  H01L21/768 ,  H01L21/304 ,  H01L23/544

CPC classification number: H01L21/6836 ,  H01L21/304 ,  H01L21/6835 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/36 ,  H01L23/544 ,  H01L24/02 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/95 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2221/68386 ,  H01L2223/5446 ,  H01L2224/02331 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05024 ,  H01L2224/11002 ,  H01L2224/11009 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11614 ,  H01L2224/11849 ,  H01L2224/13026 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13562 ,  H01L2224/13611 ,  H01L2224/13613 ,  H01L2224/1362 ,  H01L2224/13639 ,  H01L2224/13647 ,  H01L2224/13664 ,  H01L2224/14519 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/17181 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/18161

Abstract: Methods of fabricating semiconductor packages are provided. One of the methods includes forming a protection layer including metal on a first surface of a substrate to cover a semiconductor device disposed on the first surface of the substrate, attaching a support substrate to the protection layer by using an adhesive member, processing a second surface of the substrate opposite to the protection layer to remove a part of the substrate, and detaching the support substrate from the substrate.

公开(公告)号：US20170025302A1

公开(公告)日：2017-01-26

申请号：US15286801

申请日：2016-10-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gun-ho Chang ,  Un-byoung Kang ,  Tae-je Cho

IPC: H01L21/683 ,  H01L25/065 ,  H01L23/00 ,  H01L21/304 ,  H01L21/78 ,  H01L23/544 ,  H01L25/00 ,  H01L21/768

CPC classification number: H01L21/6836 ,  H01L21/304 ,  H01L21/6835 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/36 ,  H01L23/544 ,  H01L24/02 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/95 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2221/68386 ,  H01L2223/5446 ,  H01L2224/02331 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05024 ,  H01L2224/11002 ,  H01L2224/11009 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11614 ,  H01L2224/11849 ,  H01L2224/13026 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13562 ,  H01L2224/13611 ,  H01L2224/13613 ,  H01L2224/1362 ,  H01L2224/13639 ,  H01L2224/13647 ,  H01L2224/13664 ,  H01L2224/14519 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/17181 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/18161

Abstract: Methods of fabricating semiconductor packages are provided. One of the methods includes forming a protection layer including metal on a first surface of a substrate to cover a semiconductor device disposed on the first surface of the substrate, attaching a support substrate to the protection layer by using an adhesive member, processing a second surface of the substrate opposite to the protection layer to remove a part of the substrate, and detaching the support substrate from the substrate.

Abstract translation: 提供制造半导体封装的方法。 其中一种方法包括在衬底的第一表面上形成包括金属的保护层，以覆盖设置在衬底的第一表面上的半导体器件，通过使用粘合构件将支撑衬底附着到保护层上，处理第二表面 的衬底相对于保护层去除衬底的一部分，以及从衬底分离支撑衬底。