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公开(公告)号：US09898207B2
公开(公告)日：2018-02-20
申请号：US15131757
申请日：2016-04-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dong Kim , Nam Wook Kang , Han Shin Shin
CPC classification number: G06F3/0611 , G06F3/0635 , G06F3/0659 , G06F3/067
Abstract: A storage device is provided. The storage device includes storage clusters, and a controller. The controller receives a command and an address from an external host device, selects a storage cluster according to the received address, and transmits the received command and the received address to the selected storage cluster. The controller controls the storage clusters as normal storage clusters and slow storage clusters according to a temperature of a zone to which the storage clusters belong.
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2.发明授权Nonvolatile memory devices including simultaneous impedance calibration and input command 有权非易失性存储器件包括同时阻抗校准和输入命令公开(公告)号：US09361985B2
公开(公告)日：2016-06-07
申请号：US14144659
申请日：2013-12-31
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dong Kim , Soonbok Jang
CPC classification number: G11C16/06 , G11C7/04 , G11C16/10 , G11C16/20 , G11C29/028 , G11C29/50008 , G11C2029/0409 , G11C2207/2254
Abstract: An operating method of a nonvolatile memory device is provided which includes receiving a command sequence; detecting whether the input command sequence accompanies an impedance calibration operation; and if the input command sequence accompanies the impedance calibration operation, simultaneously performing an operation corresponding to the input command sequence and the impedance calibration operation.
Abstract translation: 提供了一种非易失性存储器件的操作方法，包括接收命令序列; 检测输入命令序列是否伴随阻抗校准操作; 并且如果输入命令序列伴随着阻抗校准操作，则同时执行与输入命令序列和阻抗校准操作相对应的操作。
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公开(公告)号：US20240202067A1
公开(公告)日：2024-06-20
申请号：US18223124
申请日：2023-07-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Seonghyeog CHOI , Changkyu Seol , Dong Kim , Inhoon Park , Jinsoo Lim , Youngdon Choi , Junghwan Choi
IPC: G06F11/10
CPC classification number: G06F11/10
Abstract: A method of operating a storage device includes: periodically performing a patrol read operation on a memory device; storing failure information according to the patrol read operation in a buffer memory; generating an uncorrectable error as a result of a first error correction operation performed on read data of the memory device; loading the failure information from the buffer memory; and performing a second error correction operation on the read data by using the failure information.
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公开(公告)号：US11231992B2
公开(公告)日：2022-01-25
申请号：US16793381
申请日：2020-02-18
Applicant: Samsung Electronics Co., Ltd.
Inventor： Inhoon Park , Dong Kim , Hyunglae Eun , Chulseung Lim , Wonyeoung Jung
Abstract: A memory system includes a plurality of memory devices, each of the plurality of memory devices including a plurality of memory cells, and at least one of the plurality of memory devices including a backup region, and a memory controller configured to store data to be stored in a plurality of selected memory cells in the plurality of selected memory cells and the backup region, the plurality of selected memory cells being connected to a selected word line of a selected memory device among the plurality of memory devices, and replace the selected word line with a redundancy word line to which a plurality of redundancy memory cells among the plurality of memory cells are connected in response to a correctable error correction code (CECC) occurring in at least one of the plurality of selected memory cells.
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公开(公告)号：US20210026732A1
公开(公告)日：2021-01-28
申请号：US16793381
申请日：2020-02-18
Applicant: Samsung Electronics Co., Ltd.
Inventor： Inhoon PARK , Dong Kim , Hyunglae Eun , Chulseung Lim , Wonyeoung Jung
Abstract: A memory system includes a plurality of memory devices, each of the plurality of memory devices including a plurality of memory cells, and at least one of the plurality of memory devices including a backup region, and a memory controller configured to store data to be stored in a plurality of selected memory cells in the plurality of selected memory cells and the backup region, the plurality of selected memory cells being connected to a selected word line of a selected memory device among the plurality of memory devices, and replace the selected word line with a redundancy word line to which a plurality of redundancy memory cells among the plurality of memory cells are connected in response to a correctable error correction code (CECC) occurring in at least one of the plurality of selected memory cells.
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Patent Agency Ranking
6.发明申请公开(公告)号：US20210026728A1
公开(公告)日：2021-01-28
申请号：US16790256
申请日：2020-02-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dong Kim , Inhoon Park , Jangseon Park , Hyunglae Eun
Abstract: A method of controlling repair of a volatile memory device, includes, performing a patrol read operation repeatedly to provide error position information of errors included in read data from a volatile memory device, generating accumulated error information by accumulating the error position information based on the patrol read operation performed repeatedly, determining error attribute based on the accumulated error information, the error attribute indicating correlation between the errors and a structure of the volatile memory device, and performing a runtime repair operation with respect to the volatile memory device based on the accumulated error information and the error attribute. The errors may be managed efficiently to prevent failure of the volatile memory device, and thus performance and lifetime of the volatile memory device and the storage device may be enhanced.
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公开(公告)号：US09197247B2
公开(公告)日：2015-11-24
申请号：US14718476
申请日：2015-05-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dong Kim , Seok-Won Ahn , JaePhil Kong , Myung-Suk Choi
IPC: H03M13/00 , H03M13/11 , G06F11/10 , H03M13/29 , H03M13/37 , G06F11/07 , H03M13/09 , H03M13/15 , H03M13/19
CPC classification number: H03M13/1105 , G06F11/0793 , G06F11/10 , G06F11/1012 , H03M13/09 , H03M13/1515 , H03M13/152 , H03M13/1525 , H03M13/154 , H03M13/1545 , H03M13/19 , H03M13/2903 , H03M13/2927 , H03M13/3776 , H03M13/611
Abstract: Disclosed is an error correcting method which includes detecting an error of meta data having a seed used to randomize user data; correcting the error of the meta data when the error is detected from the meta data; receiving the user data based upon seed confirmation information associated with an error existence of the seed or an error correction result of the seed; detecting an error of the user data; and correcting the error of the user data when the error is detected from the user data.
Abstract translation: 公开了一种错误校正方法，其包括检测具有用于随机化用户数据的种子的元数据的错误; 当从元数据检测到错误时，修正元数据的错误; 基于与种子的错误存在或种子的错误校正结果相关联的种子确认信息接收用户数据; 检测用户数据的错误; 以及当从用户数据检测到错误时，校正用户数据的错误。
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8.发明授权公开(公告)号：US11309054B2
公开(公告)日：2022-04-19
申请号：US16823720
申请日：2020-03-19
Applicant: Samsung Electronics Co., Ltd.
Inventor： Wonyeoung Jung , Hyunglae Eun , Dong Kim , Inhoon Park
IPC: G11C29/44 , G11C11/406 , G11C11/408 , G11C29/42
Abstract: A test operation condition of a volatile memory device is set such that an error probability is increased based on the test operation condition, compared to a normal operation condition for a normal operation of the volatile memory device. A test mode is set with respect to a test object region corresponding to at least a portion of a memory cell array included in the volatile memory device. A test operation of the volatile memory device is performed based on the test operation condition during the test mode to detect error position information of errors in data stored in the test object region. A runtime repair operation is performed with respect to the volatile memory device based on the error position information.
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公开(公告)号：US11302414B2
公开(公告)日：2022-04-12
申请号：US16351118
申请日：2019-03-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dong Kim , Hyunglae Eun
Abstract: A storage device including a nonvolatile memory device, a dynamic random access memory (DRAM) device, and a storage controller, an operation method of the storage device including performing an access operation on the DRAM device, collecting accumulated error information about the DRAM device based on the access operation, detecting a fail row of the DRAM device based on the accumulated error information, and performing a runtime repair operation on the detected fail row.
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公开(公告)号：US10409512B2
公开(公告)日：2019-09-10
申请号：US15291502
申请日：2016-10-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dong Kim
Abstract: A method of operating a storage controller which is included in a data storage device and initializes at least one main memory of the data storage device includes: transmitting, by a processor of the storage controller, a first indication signal for indicating initialization of the main memory of the data storage device to a first memory initialization device; generating, by a register of the first memory initialization device, a selection signal corresponding to the first indication signal, and outputting, by a memory set of the first memory initialization device, a first initialization signal to the main memory in response to the selection signal to initialize the main memory.
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