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    SEMICONDUCTOR PACKAGE
    1.
    发明申请
    SEMICONDUCTOR PACKAGE 审中-公开

    公开(公告)号：US20190259733A1

    公开(公告)日：2019-08-22

    申请号：US16404066

    申请日：2019-05-06

    申请人： Samsung Electronics Co., Ltd.

    发明人： Sungeun PYO ,  Jongbo SHIM ,  Ji Hwang KIM ,  Chajea JO ,  Sang-Uk HAN

    IPC分类号： H01L25/065 ,  H01L23/538 ,  H01L25/00 ,  H01L21/48 ,  H01L23/00

    摘要： A semiconductor package including a first substrate including first upper pads, the first upper pads on a top surface of the first substrate, a second substrate including second upper pads, the second upper pads on a top surface of the second substrate, a pitch of the second upper pads being less than a pitch of the first upper pads, and a first semiconductor chip on and electrically connected to both (i) at least one of the first upper pads and (ii) at least one of the second upper pads may be provided.

    INTEGRATED CIRCUIT DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
    4.
    发明申请
    INTEGRATED CIRCUIT DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME 有权

    公开(公告)号：US20230117072A1

    公开(公告)日：2023-04-20

    申请号：US18066487

    申请日：2022-12-15

    申请人： Samsung Electronics Co., Ltd.

    发明人： Chajea JO ,  Ohguk KWON ,  Namhoon KIM ,  Hyoeun KIM ,  Seunghoon YEON

    IPC分类号： H01L23/48 ,  H01L21/768 ,  H01L23/00 ,  H01L25/065

    摘要： An integrated circuit device includes a semiconductor substrate, first through-silicon-via (TSV) structures penetrating a first region of the semiconductor substrate and spaced apart from each other by a first pitch, a first individual device between the first TSV structures and spaced apart from the first TSV structures by a distance that is greater than a first keep-off distance, and second TSV structures penetrating a second region of the semiconductor substrate and spaced apart from each other by a second pitch that is less than the first pitch. The second region of the semiconductor device does not include an individual device that is homogeneous with the first individual device and between the second TSV structures.

    SEMICONDUCTOR PACKAGE
    5.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20220093543A1

    公开(公告)日：2022-03-24

    申请号：US17376616

    申请日：2021-07-15

    申请人： Samsung Electronics Co., Ltd.

    发明人： Sunkyoung SEO ,  Teak Hoon LEE ,  Chajea JO

    IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L25/10

    摘要： A semiconductor package includes a sequential stack of first and second semiconductor chips, and a first internal connection member that connects the first and second semiconductor chips to each other. The first semiconductor chip includes a first substrate that has a first top surface and a first bottom surface that are opposite to each other, and a first conductive pad on the first top surface. The second semiconductor chip includes a second substrate that has a second top surface and a second bottom surface that are opposite to each other, and a second conductive bump on the second bottom surface. The first internal connection member connects the first conductive pad to the second conductive bump. The first conductive pad has a first width in one direction. The second conductive bump has a second width in the one direction. The first width is smaller than the second width.

    INTEGRATED CIRCUIT DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
    6.
    发明申请
    INTEGRATED CIRCUIT DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME 有权

    公开(公告)号：US20210407890A1

    公开(公告)日：2021-12-30

    申请号：US17162418

    申请日：2021-01-29

    申请人： Samsung Electronics Co., Ltd.

    发明人： Chajea JO ,  Ohguk KWON ,  Namhoon KIM ,  Hyoeun KIM ,  Seunghoon YEON

    IPC分类号： H01L23/48 ,  H01L25/065 ,  H01L23/00 ,  H01L21/768

    摘要： An integrated circuit device includes a semiconductor substrate, first through-silicon-via (TSV) structures penetrating a first region of the semiconductor substrate and spaced apart from each other by a first pitch, a first individual device between the first TSV structures and spaced apart from the first TSV structures by a distance that is greater than a first keep-off distance, and second TSV structures penetrating a second region of the semiconductor substrate and spaced apart from each other by a second pitch that is less than the first pitch. The second region of the semiconductor device does not include an individual device that is homogeneous with the first individual device and between the second TSV structures.

    SEMICONDUCTOR PACKAGE
    9.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20230138813A1

    公开(公告)日：2023-05-04

    申请号：US17978507

    申请日：2022-11-01

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Sunkyoung SEO ,  Chajea JO ,  Yeongseon KIM ,  Juhyeon KIM ,  Hyoeun KIM

    IPC分类号： H01L23/00 ,  H01L23/48 ,  H01L25/065

    摘要： A first semiconductor chip includes a first semiconductor substrate, a first wiring structure arranged on the first semiconductor substrate, a plurality of through electrodes penetrating through at least a portion of the first semiconductor substrate, and a plurality of first bonding pads respectively connected to the plurality of through electrodes. A second semiconductor chip is stacked on the first semiconductor chip and includes a second semiconductor substrate, a second wiring structure arranged on the second semiconductor substrate, and a second bonding pad connected to each of the plurality of first bonding pads and arranged on the active surface of the second semiconductor substrate. Each first bonding pad has a top surface that is in direct contact with the second bonding pad and a bottom surface that is in direct contact with one through electrode.

    SEMICONDUCTOR PACKAGE
    10.
    发明公开
    SEMICONDUCTOR PACKAGE 审中-公开

    公开(公告)号：US20240162188A1

    公开(公告)日：2024-05-16

    申请号：US18356771

    申请日：2023-07-21

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Chajea JO ,  Dohyun KIM ,  Seungryong OH

    IPC分类号： H01L25/065 ,  H01L23/31

    CPC分类号： H01L25/0652 ,  H01L23/3128 ,  H01L24/16 ,  H01L2224/16145 ,  H01L2224/16227

    摘要： A semiconductor package includes a substrate; a first chip structure on the substrate and having a first thickness in a first direction; a second chip structure on the substrate adjacent to the first chip structure along a second direction and having a second thickness in the first direction; a third chip structure on the substrate and adjacent to the first chip structure and the second chip structure in a third direction perpendicular to the second direction; and an encapsulant covering the first chip structure, the second chip structure, and the third chip structure, wherein the third chip structure includes a lower chip structure that overlaps a first portion of a space between the first chip structure and the second chip structure in the third direction, and an upper chip structure on the lower chip structure such that a second portion of the space is exposed in the third direction.