公开(公告)号：US11569158B2

公开(公告)日：2023-01-31

申请号：US17228784

申请日：2021-04-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam Kang ,  Youngchan Ko ,  Jeongseok Kim ,  Kyung Don Mun ,  Bongju Cho

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L23/31

Abstract: A semiconductor package includes a redistribution substrate having a dielectric layer and a wiring pattern in the dielectric layer, the wiring pattern including a line part that extends horizontally, and a via part connected to the line part, the via part having a width less than a width of the line part, a passivation layer on a top surface of the redistribution substrate, the passivation layer including a material different from a material of the dielectric layer, a conductive pillar that penetrates the passivation layer, the conductive pillar being connected to the via part, and a connection terminal on a top surface of the conductive pillar, a distance between the top surface of the conductive pillar and a top surface of the passivation layer being greater than a thickness of the passivation layer.

公开(公告)号：US12046562B2

公开(公告)日：2024-07-23

申请号：US18151517

申请日：2023-01-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myungsam Kang ,  Youngchan Ko ,  Jeongseok Kim ,  Bongju Cho

IPC: H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L25/10

CPC classification number: H01L23/5389 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/19 ,  H01L24/20 ,  H01L25/105 ,  H01L2221/68372 ,  H01L2224/214 ,  H01L2224/215 ,  H01L2225/1035 ,  H01L2225/1058

Abstract: A semiconductor package includes a first redistribution structure having a first surface in which a first pad and a second pad are embedded and including a first redistribution layer thereon, and a vertical connection structure including a land layer and a pillar layer. The land layer is embedded in the first surface of the first redistribution structure, and a width of an upper surface of the land layer is narrower than a width of a lower surface of the pillar layer.

公开(公告)号：US11837537B2

公开(公告)日：2023-12-05

申请号：US17403233

申请日：2021-08-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bongju Cho ,  Myungsam Kang ,  Younggwan Ko ,  Gun Lee ,  Jaekul Lee

IPC: H01L23/522 ,  H01L23/31 ,  H01L23/495 ,  H01L23/528 ,  H01L23/00

CPC classification number: H01L23/5226 ,  H01L23/3157 ,  H01L23/49531 ,  H01L23/49534 ,  H01L23/5283 ,  H01L24/09 ,  H01L2224/02372 ,  H01L2224/02377 ,  H01L2224/02379 ,  H01L2924/3511

Abstract: A fan-out semiconductor package includes a first connection structure having first and second surfaces, a first semiconductor chip disposed on the first surface, a first encapsulant disposed on the first surface and covering at least a portion of the first semiconductor chip, a second semiconductor chip disposed on the second surface, one or more first metal members disposed on the second surface, one or more second metal members disposed on the second surface, a second encapsulant disposed on the second surface and respectively covering at least portions of the second semiconductor chip and the first and second metal members, and a second connection structure disposed on an opposite side of a side of the second encapsulant, on which the first connection structure is disposed.

公开(公告)号：US11562966B2

公开(公告)日：2023-01-24

申请号：US17195823

申请日：2021-03-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myungsam Kang ,  Youngchan Ko ,  Jeongseok Kim ,  Bongju Cho

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/31 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L25/10

Abstract: A semiconductor package includes a first redistribution structure having a first surface in which a first pad and a second pad are embedded and including a first redistribution layer thereon, and a vertical connection structure including a land layer and a pillar layer. The land layer is embedded in the first surface of the first redistribution structure, and a width of an upper surface of the land layer is narrower than a width of a lower surface of the pillar layer.

公开(公告)号：US11329014B2

公开(公告)日：2022-05-10

申请号：US16703279

申请日：2019-12-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam Kang ,  Changbae Lee ,  Bongju Cho ,  Younggwan Ko ,  Yongkoon Lee ,  Moonil Kim ,  Youngchan Ko

IPC: H01L23/66 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L23/522

Abstract: A semiconductor package includes: a connection structure including one or more redistribution layers; a core structure disposed on a surface of the connection structure; a semiconductor chip disposed on the surface and including connection pads electrically connected to the redistribution layers of the connection structure; a first encapsulant disposed on the surface and covering at least a portion of each of the core structure and the semiconductor chip; an antenna substrate disposed on the first encapsulant and including one or more wiring layers, at least a portion of the wiring layers including an antenna pattern; and a through via penetrating at least a portion of each of the connection structure, the core structure, the first encapsulant, and the antenna substrate.

公开(公告)号：US12119305B2

公开(公告)日：2024-10-15

申请号：US18161066

申请日：2023-01-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyungdon Mun ,  Myungsam Kang ,  Youngchan Ko ,  Yieok Kwon ,  Jeongseok Kim ,  Gongje Lee ,  Bongju Cho

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065

CPC classification number: H01L23/5386 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5385 ,  H01L24/08 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/08235 ,  H01L2224/73204 ,  H01L2225/06517 ,  H01L2225/0652

Abstract: A semiconductor package includes a redistribution substrate including a first redistribution layer; a semiconductor chip electrically connected to the first redistribution layer; a vertical connection structure adjacent a periphery of the semiconductor chip and electrically connected to the first redistribution layer; and an encapsulant on the vertical connection structure. The vertical connection structure includes a metal pillar having a bottom surface facing the redistribution substrate, a top surface positioned opposite to the bottom surface, and a side surface positioned between the bottom surface and the top surface. The vertical connection structure further includes a plating layer on each of the bottom surface, the top surface, and the side surface of the metal pillar, and having a roughened surface.

公开(公告)号：US12057380B2

公开(公告)日：2024-08-06

申请号：US17581227

申请日：2022-01-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam Kang ,  Bongju Cho

IPC: H01L23/498 ,  H01L23/00

CPC classification number: H01L23/49811 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/73 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/81411 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455

Abstract: A semiconductor package includes: a redistribution substrate including a lower insulating layer, a redistribution via penetrating through the lower insulating layer, a redistribution layer connected to the redistribution via on the lower insulating layer, and an upper insulating layer on the lower insulating layer and having a first surface and a second surface opposing the first surface; a pad structure including a pad portion, disposed on the first surface of the redistribution substrate, and a via portion penetrating through the upper insulating layer to connect the redistribution layer and the pad portion to each other; a semiconductor chip disposed on the first surface of the redistribution substrate and including a pad; and a connection member in contact with the pad portion and the pad of the semiconductor chip between the pad structure and the pad of the semiconductor chip. The pad portion of the pad structure has a hemispherical shape, and a side surface of the via portion of the pad structure is in contact with the upper insulating layer.

公开(公告)号：US11935847B2

公开(公告)日：2024-03-19

申请号：US17737472

申请日：2022-05-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam Kang ,  Changbae Lee ,  Bongju Cho ,  Younggwan Ko ,  Yongkoon Lee ,  Moonil Kim ,  Youngchan Ko

IPC: H01L23/66 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/522

CPC classification number: H01L23/66 ,  H01L23/3114 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/5226 ,  H01L24/05 ,  H01L24/13 ,  H01L2223/6677 ,  H01L2224/0401

Abstract: A semiconductor package includes: a connection structure having a first surface and a second, and including a redistribution layer; a passive component disposed on the first surface of the connection structure, and electrically connected to the redistribution layer; a semiconductor chip disposed on the first surface of the connection structure, and electrically connected to the redistribution layer; a first encapsulant disposed on the first surface of the connection structure and covering at least a portion of the semiconductor chip; a second encapsulant disposed on the first surface of the connection structure and covering at least a portion of the passive component; an antenna substrate disposed on the first encapsulant and including a wiring layer, at least a portion of the wiring layer including an antenna pattern; and a through via penetrating at least a portion of each of the connection structure, the first encapsulant, and the antenna substrate.

公开(公告)号：US20230131240A1

公开(公告)日：2023-04-27

申请号：US17723689

申请日：2022-04-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngchan KO ,  Myungsam Kang ,  Jeongseok Kim ,  Bongju Cho

IPC: H01L23/538 ,  H01L25/10 ,  H01L23/498

Abstract: A semiconductor package includes a lower redistribution structure including a wiring layer, and a via connected to the wiring layer; a semiconductor chip on the lower redistribution structure; wiring patterns disposed on the lower redistribution structure and extending in a horizontal direction, the wiring patterns including a first wiring pattern; metal patterns on the wiring patterns, the metal patterns including a first connection pillar and a first dummy pillar disposed on the first wiring pattern; an encapsulant on the lower redistribution structure, the semiconductor chip, the wiring patterns, and the metal patterns; and an upper redistribution structure on the encapsulant. The first connection pillar is directly connected to the upper redistribution structure.

公开(公告)号：US20220013465A1

公开(公告)日：2022-01-13

申请号：US17195823

申请日：2021-03-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myungsam Kang ,  Youngchan Ko ,  Jeongseok Kim ,  Bongju Cho

IPC: H01L23/538 ,  H01L25/10 ,  H01L23/00 ,  H01L23/31 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor package includes a first redistribution structure having a first surface in which a first pad and a second pad are embedded and including a first redistribution layer thereon, and a vertical connection structure including a land layer and a pillar layer. The land layer is embedded in the first surface of the first redistribution structure, and a width of an upper surface of the land layer is narrower than a width of a lower surface of the pillar layer.