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公开(公告)号：US09990022B2
公开(公告)日：2018-06-05
申请号：US15199567
申请日：2016-06-30
Applicant: QUALCOMM Incorporated
Inventor： Mong Chit Wong , Nam Dang , Rajeev Jain , Sassan Shahrokhinia , Yu Huang , Lipeng Cao
Abstract: An integrated circuit (IC) is disclosed herein for adaptive power multiplexing with a power distribution network. In an example aspect, the integrated circuit includes a first power rail, a second power rail, and a load power rail. The integrated circuit also includes multiple power-multiplexer tiles and power-multiplexer control circuitry. The multiple power-multiplexer tiles are coupled in series in a chained arrangement and configured to jointly perform a power-multiplexing operation. Each power-multiplexer tile is configured to switch between coupling the load power rail to the first power rail and coupling the load power rail to the second power rail. The power-multiplexer control circuitry is configured to control a direction of current flow to prevent cross-conduction between the first power rail and the second power rail during the power-multiplexing operation.
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公开(公告)号：US09263107B1
公开(公告)日：2016-02-16
申请号：US14535271
申请日：2014-11-06
Applicant: QUALCOMM Incorporated
Inventor： Mark Charles Wayland , Thomas Clark Bryan , Yu Huang , Michael Joseph Brunolli
CPC classification number: G11C7/109 , G11C7/1051 , G11C7/1063 , G11C7/1066 , G11C7/222 , G11C29/022 , G11C29/023 , G11C29/028 , G11C2029/0409 , H03K3/017 , H03K5/1565 , H03K19/018507
Abstract: A driver circuit includes an output driver including a plurality of output driver legs. The driver circuit further includes a duty cycle adjuster configured to adjust a duty cycle of a signal provided to the output driver. The driver circuit further includes an isolation module configured to isolate at least one output driver leg of the output driver legs from remaining output driver legs of the output driver legs. The driver circuit further includes a duty cycle monitor configured to monitor an output of the at least one output driver leg when the at least one output driver leg is isolated from the remaining output driver legs, and to provide the monitored output to the duty cycle adjuster.
Abstract translation: 驱动器电路包括具有多个输出驱动器支路的输出驱动器。 驱动器电路还包括占空比调整器，其被配置为调整提供给输出驱动器的信号的占空比。 驱动器电路还包括隔离模块，其被配置为将输出驱动器支路的至少一个输出驱动器支路与输出驱动器支路的剩余输出驱动器支路隔离。 驱动器电路还包括占空比监视器，其被配置为当至少一个输出驱动器支路与剩余的输出驱动器支路隔离时监视至少一个输出驱动器支路的输出，并且将所监视的输出提供给占空比调整器 。
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公开(公告)号：US10705558B2
公开(公告)日：2020-07-07
申请号：US15967344
申请日：2018-04-30
Applicant: QUALCOMM Incorporated
Abstract: Certain aspects of the present disclosure provide an input clock switching system, including: a clock source configured to output a reference clock signal; a clock generator circuit connected to the clock source and configured to output a plurality of input clock signals based on the reference clock signal; an output clock multiplexer, configured to: receive the plurality of input clock signals; receive an output clock selection signal; and output a first clock signal, wherein the first clock signal is one of the input clock signals; and a glitch suppression circuit, configured to: receive the first clock signal; receive a glitch suppression signal; output a clock output signal, wherein the clock output signal is: the first clock signal when the glitch suppression signal is in a first state; and a logic low signal when the glitch suppression signal is in a second state.
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Patent Agency Ranking
公开(公告)号：US20140197879A1
公开(公告)日：2014-07-17
申请号：US13742925
申请日：2013-01-16
Applicant: QUALCOMM INCORPORATED
Inventor： Yu Huang
IPC: H03K17/687
CPC classification number: H03K17/165
Abstract: Techniques for reducing crowbar current are disclosed. In one embodiment, a circuit for reducing crowbar current comprises an inverter having an input and an output, a first switch coupled between the inverter and a first power supply rail, and a second switch coupled between the inverter and a second power supply rail. The circuit also comprises a feedback circuit coupled to the output of the inverter, wherein the feedback circuit is configured to turn off the first switch when the output of the inverter is in a low output state, and to turn off the second switch when the output of the inverter is in a high output state.
Abstract translation: 公开了减少撬棒电流的技术。 在一个实施例中，用于减少撬棒电流的电路包括具有输入和输出的反相器，耦合在逆变器和第一电源轨之间的第一开关和耦合在逆变器和第二电源轨之间的第二开关。 电路还包括耦合到逆变器的输出的反馈电路，其中反馈电路被配置为当逆变器的输出处于低输出状态时关闭第一开关，并且当输出端 的变频器处于高输出状态。
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公开(公告)号：US10587253B1
公开(公告)日：2020-03-10
申请号：US16205093
申请日：2018-11-29
Applicant: QUALCOMM Incorporated
Inventor： Yu Huang , Nam Dang , Keith Alan Bowman , Navid Toosizadeh
Abstract: A programmable delay line includes a pulse generator configured to generate a pulse in response to a transition of an input signal; an oscillator configured to generate a clock in response to the pulse; a counter configured to change a current count from a first value towards a second value in response to periods of the clock; and a gating device configured to output the transition of the input signal to generate an output signal in response to the current count reaching the second value. The delay of the input signal is a function of the difference between the first value and the second value. The delay line may be used in different applications, such as a dynamic variation monitor (DVM) configured to detect supply voltage droop. The DVM may be in an adaptive clock distribution (ACD) to reduce the clock frequency for a datapath in response to a droop.
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公开(公告)号：US20180004276A1
公开(公告)日：2018-01-04
申请号：US15199567
申请日：2016-06-30
Applicant: QUALCOMM Incorporated
Inventor： Mong Chit Wong , Nam Dang , Rajeev Jain , Sassan Shahrokhinia , Yu Huang , Lipeng Cao
IPC: G06F1/32
Abstract: An integrated circuit (IC) is disclosed herein for adaptive power multiplexing with a power distribution network. In an example aspect, the integrated circuit includes a first power rail, a second power rail, and a load power rail. The integrated circuit also includes multiple power-multiplexer tiles and power-multiplexer control circuitry. The multiple power-multiplexer tiles are coupled in series in a chained arrangement and configured to jointly perform a power-multiplexing operation. Each power-multiplexer tile is configured to switch between coupling the load power rail to the first power rail and coupling the load power rail to the second power rail. The power-multiplexer control circuitry is configured to control a direction of current flow to prevent cross-conduction between the first power rail and the second power rail during the power-multiplexing operation.
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公开(公告)号：US08928366B2
公开(公告)日：2015-01-06
申请号：US13742925
申请日：2013-01-16
Applicant: QUALCOMM Incorporated
Inventor： Yu Huang
IPC: H03K3/00 , H03K17/687
CPC classification number: H03K17/165
Abstract: Techniques for reducing crowbar current are disclosed. In one embodiment, a circuit for reducing crowbar current comprises an inverter having an input and an output, a first switch coupled between the inverter and a first power supply rail, and a second switch coupled between the inverter and a second power supply rail. The circuit also comprises a feedback circuit coupled to the output of the inverter, wherein the feedback circuit is configured to turn off the first switch when the output of the inverter is in a low output state, and to turn off the second switch when the output of the inverter is in a high output state.
Abstract translation: 公开了减少撬棒电流的技术。 在一个实施例中，用于减少撬棒电流的电路包括具有输入和输出的反相器，耦合在逆变器和第一电源轨之间的第一开关和耦合在逆变器和第二电源轨之间的第二开关。 电路还包括耦合到逆变器的输出的反馈电路，其中反馈电路被配置为当逆变器的输出处于低输出状态时关闭第一开关，并且当输出端 的变频器处于高输出状态。
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公开(公告)号：US09077289B2
公开(公告)日：2015-07-07
申请号：US13918771
申请日：2013-06-14
Applicant: QUALCOMM Incorporated
Inventor： Yu Huang , Thomas Clark Bryan , Mark Wayland
Abstract: A receiver is disclosed. The receiver includes an amplifier and a bias circuit configured to provide a bias current to the amplifier. The bias circuit is self biasing. The bias circuit is also configured to adjust the bias current using positive feedback from the amplifier.
Abstract translation: 公开了接收机。 接收机包括放大器和被配置为向放大器提供偏置电流的偏置电路。 偏置电路是自偏置的。 偏置电路还被配置为使用来自放大器的正反馈来调整偏置电流。
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