公开(公告)号：US20160094202A1

公开(公告)日：2016-03-31

申请号：US14503090

申请日：2014-09-30

Applicant: QUALCOMM Incorporated

Inventor： Timothy Mowry Hollis ,  Thomas Clark Bryan ,  Mark Wayland

IPC: H03K3/011 ,  G11C11/4096

CPC classification number: H03K3/011 ,  G11C11/4096 ,  H03K19/0005 ,  H03K19/00384 ,  H03K19/018585

Abstract: Systems and methods for equalizing an output driver circuit based on information from calibration of the output impedance of the driver circuit are disclosed. Settings that result from the calibration are referred to as calibration codes. The output driver circuit includes multiple pull-up elements that are enabled or disabled to produce a desired output impedance when the output is high and multiple pull-down elements that are enabled or disabled to produce the desired output impedance when the output is low. The number of pull-up elements that are enabled and the number of pull-down elements that are enabled is set by calibration. The results of the calibration (i.e., the number of enabled elements for the pull-up and the number of enabled elements for the pull-down) are used to set controls for an amount of pre-emphasis and/or to set controls for output slew rates.

Abstract translation: 公开了基于来自校准驱动电路的输出阻抗的信息来均衡输出驱动器电路的系统和方法。 由校准产生的设置称为校准代码。 输出驱动器电路包括多个上拉元件，其在输出为高电平时使能或禁止产生期望的输出阻抗，并且当输出为低电平时启用或禁用以产生所需输出阻抗的多个下拉元件。 启用的上拉元件数量和启用的下拉元件数量通过校准设置。 校准的结果（即，上拉的使能元件数量和下拉使能元件的数量）用于设置预加重量的控制和/或设置控制输出 压摆率。

公开(公告)号：US09077289B2

公开(公告)日：2015-07-07

申请号：US13918771

申请日：2013-06-14

Applicant: QUALCOMM Incorporated

Inventor： Yu Huang ,  Thomas Clark Bryan ,  Mark Wayland

IPC: H03F3/45 ,  H03F3/193 ,  H03F1/30

CPC classification number: H03F3/193 ,  H03F1/301

Abstract: A receiver is disclosed. The receiver includes an amplifier and a bias circuit configured to provide a bias current to the amplifier. The bias circuit is self biasing. The bias circuit is also configured to adjust the bias current using positive feedback from the amplifier.

Abstract translation: 公开了接收机。 接收机包括放大器和被配置为向放大器提供偏置电流的偏置电路。 偏置电路是自偏置的。 偏置电路还被配置为使用来自放大器的正反馈来调整偏置电流。

公开(公告)号：US09337807B2

公开(公告)日：2016-05-10

申请号：US14503090

申请日：2014-09-30

Applicant: QUALCOMM Incorporated

Inventor： Timothy Mowry Hollis ,  Thomas Clark Bryan ,  Mark Wayland

IPC: H03K3/00 ,  H03K3/011 ,  G11C11/4096

CPC classification number: H03K3/011 ,  G11C11/4096 ,  H03K19/0005 ,  H03K19/00384 ,  H03K19/018585

Abstract: Systems and methods for equalizing an output driver circuit based on information from calibration of the output impedance of the driver circuit are disclosed. Settings that result from the calibration are referred to as calibration codes. The output driver circuit includes multiple pull-up elements that are enabled or disabled to produce a desired output impedance when the output is high and multiple pull-down elements that are enabled or disabled to produce the desired output impedance when the output is low. The number of pull-up elements that are enabled and the number of pull-down elements that are enabled is set by calibration. The results of the calibration (i.e., the number of enabled elements for the pull-up and the number of enabled elements for the pull-down) are used to set controls for an amount of pre-emphasis and/or to set controls for output slew rates.

Abstract translation: 公开了基于来自校准驱动电路的输出阻抗的信息来均衡输出驱动器电路的系统和方法。 由校准产生的设置称为校准代码。 输出驱动器电路包括多个上拉元件，其在输出为高电平时使能或禁止产生期望的输出阻抗，并且当输出为低电平时启用或禁用以产生所需输出阻抗的多个下拉元件。 启用的上拉元件数量和启用的下拉元件数量通过校准设置。 校准的结果（即，上拉的使能元件数量和下拉使能元件的数量）用于设置预加重量的控制和/或设置控制输出 压摆率。

公开(公告)号：US09166565B2

公开(公告)日：2015-10-20

申请号：US14056913

申请日：2013-10-17

Applicant: QUALCOMM Incorporated

Inventor： Michael Joseph Brunolli ,  Mark Wayland

IPC: H03K3/01 ,  H03K19/00 ,  H03K19/003 ,  H04L25/02 ,  G11C7/10

CPC classification number: H03K3/01 ,  G11C7/1057 ,  H03K19/0005 ,  H03K19/00315 ,  H04L25/0278

Abstract: An output driver configured to drive an output node includes a pull-down section having a plurality of legs and a pull-up section having a plurality of pull-up legs. Each leg and pull-up leg includes a data path and a calibration path. The data paths in the pull-down section are configured to conduct to ground responsive to an assertion of a complement data output signal whereas the data paths in the pull-up section are configured to conduct to a power supply node responsive to a de-assertion of the complement data output signal.

Abstract translation: 配置为驱动输出节点的输出驱动器包括具有多个支脚的下拉部分和具有多个上拉支腿的上拉部分。 每个腿和上拉腿包括数据路径和校准路径。 下拉部分中的数据路径被配置为响应于补偿数据输出信号的断言而导通到地，而上拉部分中的数据路径被配置为响应于断言而传导到电源节点 的补码数据输出信号。

公开(公告)号：US20150109023A1

公开(公告)日：2015-04-23

申请号：US14056904

申请日：2013-10-17

Applicant: QUALCOMM Incorporated

Inventor： Michael Brunolli ,  Mark Wayland

IPC: H03K19/00

CPC classification number: H03K19/0005 ,  H03K5/06 ,  H03K6/04 ,  H03K19/017545 ,  H03K19/018528 ,  H04L25/0278 ,  H04L25/05

Abstract: An output driver for driving a data output signal through an output pad includes a plurality of calibration paths to calibrate the impedance of the output pad. Depending upon the desired impedance, various ones of the calibration paths are selectively coupled to the output pad. Each selected calibration path adds a capacitive load to a data node, which affects the slew rate for the data output signal. To adjust the capacitive load on the data node in light of the calibration path selections, the output driver includes a plurality of selectable capacitors corresponding to the plurality of calibration paths. If a calibration path is not selected to couple to the output pad, the corresponding selectable capacitor capacitively loads the data node.

Abstract translation: 用于通过输出焊盘驱动数据输出信号的输出驱动器包括多个校准路径以校准输出焊盘的阻抗。 根据期望的阻抗，各种校准路径选择性地耦合到输出焊盘。 每个选定的校准路径将一个容性负载添加到数据节点，影响数据输出信号的转换速率。 为了根据校准路径选择来调整数据节点上的容性负载，输出驱动器包括对应于多个校准路径的多个可选择的电容器。 如果没有选择校准路径来耦合到输出焊盘，相应的可选择电容可以电容性地加载数据节点。

公开(公告)号：US09111848B1

公开(公告)日：2015-08-18

申请号：US14272324

申请日：2014-05-07

Applicant: QUALCOMM Incorporated

Inventor： Kenneth Dubowski ,  Thomas Clark Bryan ,  Mark Wayland

IPC: H01L23/58 ,  H01L21/66 ,  H01L27/118 ,  G01R31/28 ,  G01R31/3185

CPC classification number: H01L22/20 ,  G01R31/2884 ,  G01R31/31701 ,  G01R31/31724 ,  G01R31/318541 ,  G01R31/318547 ,  G01R31/318555 ,  H01L27/11807

Abstract: A control circuit generates data signals and configuration commands that are provided to an interface circuit. The interface circuit includes a configuration circuit that generates configuration signals according to the configuration commands and a drive component that generates interface signals according to the data signals. The interface signals are generated with a drive characteristic determined according to the configuration signals applied to configuration devices that selectively activate a configuration of drive devices. A diagnostic circuit is coupled to the control circuit and the interface circuit and is configured to receive a test state indication and acquire a corresponding portion of the configuration signals. The diagnostic circuit compares the test state indication and the portion of the configuration signals to diagnose a stuck-at fault condition within a faulty configuration circuit and propagate a fault indication to the control circuit.

Abstract translation: 控制电路产生提供给接口电路的数据信号和配置命令。 接口电路包括根据配置命令产生配置信号的配置电路和根据数据信号产生接口信号的驱动组件。 通过根据施加到选择性地激活驱动装置的配置的配置装置的配置信号确定的驱动特性来生成接口信号。 诊断电路耦合到控制电路和接口电路，并且被配置为接收测试状态指示并获取配置信号的相应部分。 诊断电路比较测试状态指示和配置信号的部分，以诊断故障配置电路内的故障状态，并将故障指示传播到控制电路。

公开(公告)号：US09083330B2

公开(公告)日：2015-07-14

申请号：US14056904

申请日：2013-10-17

Applicant: QUALCOMM Incorporated

Inventor： Michael Joseph Brunolli ,  Mark Wayland

IPC: H03K19/003 ,  H03K19/00 ,  H03K19/0175 ,  H04L25/02

CPC classification number: H03K19/0005 ,  H03K5/06 ,  H03K6/04 ,  H03K19/017545 ,  H03K19/018528 ,  H04L25/0278 ,  H04L25/05

Abstract: An output driver for driving a data output signal through an output pad includes a plurality of calibration paths to calibrate the impedance of the output pad. Depending upon the desired impedance, various ones of the calibration paths are selectively coupled to the output pad. Each selected calibration path adds a capacitive load to a data node, which affects the slew rate for the data output signal. To adjust the capacitive load on the data node in light of the calibration path selections, the output driver includes a plurality of selectable capacitors corresponding to the plurality of calibration paths. If a calibration path is not selected to couple to the output pad, the corresponding selectable capacitor capacitively loads the data node.

Abstract translation: 用于通过输出焊盘驱动数据输出信号的输出驱动器包括多个校准路径以校准输出焊盘的阻抗。 根据期望的阻抗，各种校准路径选择性地耦合到输出焊盘。 每个选定的校准路径将一个容性负载添加到数据节点，影响数据输出信号的转换速率。 为了根据校准路径选择来调整数据节点上的容性负载，输出驱动器包括对应于多个校准路径的多个可选择的电容器。 如果没有选择校准路径来耦合到输出焊盘，相应的可选择电容可以电容性地加载数据节点。

公开(公告)号：US20150109030A1

公开(公告)日：2015-04-23

申请号：US14056913

申请日：2013-10-17

Applicant: QUALCOMM Incorporated

Inventor： Michael Brunolli ,  Mark Wayland

IPC: H03K3/01

CPC classification number: H03K3/01 ,  G11C7/1057 ,  H03K19/0005 ,  H03K19/00315 ,  H04L25/0278

Abstract: An output driver configured to drive an output node includes a pull-down section having a plurality of legs and a pull-up section having a plurality of pull-up legs. Each leg and pull-up leg includes a data path and a calibration path. The data paths in the pull-down section are configured to conduct to ground responsive to an assertion of a complement data output signal whereas the data paths in the pull-up section are configured to conduct to a power supply node responsive to a de-assertion of the complement data output signal.

Abstract translation: 配置为驱动输出节点的输出驱动器包括具有多个支脚的下拉部分和具有多个上拉支腿的上拉部分。 每个腿和上拉腿包括数据路径和校准路径。 下拉部分中的数据路径被配置为响应于补充数据输出信号的断言而导通到地，而上拉部分中的数据路径被配置为响应于断言而导向电源节点 的补码数据输出信号。