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1.发明授权公开(公告)号：US11184018B1
公开(公告)日：2021-11-23
申请号：US17087234
申请日：2020-11-02
摘要： Certain aspects of the present disclosure generally relate to circuitry and techniques for digital-to-analog conversion. For example, certain aspects provide an apparatus for digital-to-analog conversion. The apparatus generally includes a mixing-mode digital-to-analog converter (DAC), a duty cycle adjustment circuit having an input coupled to an input clock node and having an output coupled to a clock input of the mixing-mode DAC, and a current comparison circuit having inputs coupled to outputs of the mixing-mode DAC and having an output coupled to a control input of the duty cycle adjustment circuit.
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公开(公告)号：US09853654B2
公开(公告)日：2017-12-26
申请号：US14631578
申请日：2015-02-25
CPC分类号： H03M1/0626 , H03M1/002 , H03M1/687 , H03M3/368 , H03M3/502 , H03M7/3042
摘要： In one embodiment, a method for converting an input digital signal into an analog signal is provided. The method comprises modulating the input digital signal into a modulated digital signal, and converting the modulated digital signal into the analog signal using a digital-to-analog converter (DAC). The modulation shapes quantization noise of the DAC to place a notch at a frequency within an out-of-bound frequency band to reduce the quantization noise within the out-of-bound frequency band.
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公开(公告)号：US20160094195A1
公开(公告)日：2016-03-31
申请号：US14639553
申请日：2015-03-05
发明人： Li Du , Sang Min Lee , Dongwon Seo
CPC分类号： H03G3/3042 , G05F1/561 , H03F1/0233 , H03F3/193 , H03F3/21 , H03F2200/21 , H03F2200/252 , H03F2200/451 , H03K5/24
摘要： A converter including: an amplifier having first and second input terminals and an output terminal, the first input terminal configured to receive a reference voltage; an array of resistors configured to generate a tuning voltage; and a first plurality of switches coupled to the second input terminal of the amplifier and the array of resistors, the first plurality of switches configured to adjust a gain of the amplifier by selecting at least one resistor in the array of resistors to connect to the second input terminal of the amplifier.
摘要翻译： A转换器，包括：放大器，具有第一和第二输入端子和输出端子，所述第一输入端子被配置为接收参考电压; 配置成产生调谐电压的电阻阵列; 以及耦合到所述放大器的第二输入端子和所述电阻器阵列的第一多个开关，所述第一多个开关被配置为通过选择所述电阻器阵列中的至少一个电阻器来调节所述放大器的增益，以连接到所述第二 放大器的输入端。
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公开(公告)号：US08896472B2
公开(公告)日：2014-11-25
申请号：US13791536
申请日：2013-03-08
发明人： Dongwon Seo , Sang Min Lee
CPC分类号： H03M1/785 , H03M1/0863 , H03M1/687 , H03M1/747
摘要： An N-bit digital-to-analog converter (DAC) includes N input stages each of which generates the same amount of current and includes a pair of similarly sized transistor switches responsive to differential bits. The 2M−1 input stages associated with the M most significant bits of the DAC are connected in parallel and deliver their currents differentially to the DAC's current summing nodes. Each of the remaining (N−M) stages includes a resistive network that supplies a current defined by a binary weight of the stage's bit position within the DAC. The (N−M) stages deliver their currents to the current summing nodes differentially. The DAC further includes an impedance attenuator adapted to maintain the impedance of the current summing nodes and the voltage difference between the current summing nodes within a range defined by a gain of a differential amplifier disposed in the impedance attenuator.
摘要翻译： N位数模转换器（DAC）包括N个输入级，每个输入级产生相同量的电流，并且包括响应于差分位的一对类似尺寸的晶体管开关。 与DAC的M个最高有效位相关联的2M-1个输入级并联连接，并将其电流差分地传递给DAC的当前求和节点。 剩余（N-M）级中的每一个包括电阻网络，其提供由DAC内的级位位置的二进制权重定义的电流。 （N-M）级将它们的电流差分地传递到当前求和节点。 DAC还包括阻抗衰减器，其适于在由设置在阻抗衰减器中的差分放大器的增益限定的范围内保持电流求和节点的阻抗和电流求和节点之间的电压差。
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公开(公告)号：US11728822B2
公开(公告)日：2023-08-15
申请号：US17359918
申请日：2021-06-28
发明人： Shahin Mehdizad Taleie , Dongwon Seo , Ashok Swaminathan , Gurkanwal Singh Sahota , Andrew Weil , Haibo Fei
摘要： Certain aspects of the present disclosure provide a digital-to-analog converter (DAC) system. The DAC system generally includes a plurality of current steering cells, each comprising a current source coupled to at least two current steering switches, wherein control inputs of the at least two current steering switches are coupled to an input path of the DAC system. The DAC system may also include a current source toggle circuit configured to selectively disable the current source of at least one of the plurality of current steering cells, and a feedforward path coupled between the input path and at least one control input of the current source toggle circuit.
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6.发明申请公开(公告)号：US20200099389A1
公开(公告)日：2020-03-26
申请号：US16367712
申请日：2019-03-28
发明人： Eunyung Sung , Nitz Saputra , Behnam Sedighi , Ashok Swaminathan , Honghao Ji , Shahin Mehdizad Taleie , Dongwon Seo
摘要： A current digital-to-analog converter includes a binary current-generating section configured to generate a binary-weighted current based on a first set of control signals; a unary current-generating section configured to generate a unary-weighted current based on a second set of control signals; and a current combining circuit configured to add or subtract a reference current and a current generated by a current source of the unary current-generating section using the binary-weighted current.
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公开(公告)号：US20160218499A1
公开(公告)日：2016-07-28
申请号：US14606746
申请日：2015-01-27
发明人： Honghao Ji , Dongwon Seo
IPC分类号： H02H3/18
CPC分类号： H02H3/18 , H01L27/0266 , H01L27/0292 , H02H11/003
摘要： A reverse current protection (RCP) circuit is provided that includes an RCP switch coupled between a power supply rail and a buffer power supply node. A control circuit powered by a buffer supply voltage on the buffer power supply node controls the RCP switch to open in response to a discharge of a power supply voltage carried on the power supply rail.
摘要翻译： 提供了一个反向电流保护（RCP）电路，其包括耦合在电源轨和缓冲电源节点之间的RCP开关。 由缓冲器电源节点上的缓冲器电源供电的控制电路控制RCP开关响应于在电源轨上承载的电源电压的放电而打开。
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公开(公告)号：US20140253357A1
公开(公告)日：2014-09-11
申请号：US13791536
申请日：2013-03-08
发明人： Dongwon Seo , Sang-Min Lee
IPC分类号： H03M1/78
CPC分类号： H03M1/785 , H03M1/0863 , H03M1/687 , H03M1/747
摘要： An N-bit digital-to-analog converter (DAC) includes N input stages each of which generates the same amount of current and includes a pair of similarly sized transistor switches responsive to differential bits. The 2M−1 input stages associated with the M most significant bits of the DAC are connected in parallel and deliver their currents differentially to the DAC's current summing nodes. Each of the remaining (N-M) stages includes a resistive network that supplies a current defined by a binary weight of the stage's bit position within the DAC. The (N-M) stages deliver their currents to the current summing nodes differentially. The DAC further includes an impedance attenuator adapted to maintain the impedance of the current summing nodes and the voltage difference between the current summing nodes within a range defined by a gain of a differential amplifier disposed in the impedance attenuator.
摘要翻译： N位数模转换器（DAC）包括N个输入级，每个输入级产生相同量的电流，并且包括响应于差分位的一对类似尺寸的晶体管开关。 与DAC的M个最高有效位相关联的2M-1个输入级并联连接，并将其电流差分地传递给DAC的当前求和节点。 剩余（N-M）级中的每一个包括电阻网络，其提供由DAC内的级位位置的二进制权重定义的电流。 （N-M）级将它们的电流差分地传递到当前求和节点。 DAC还包括阻抗衰减器，其适于在由设置在阻抗衰减器中的差分放大器的增益限定的范围内保持电流求和节点的阻抗和电流求和节点之间的电压差。
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9.发明授权公开(公告)号：US11705921B2
公开(公告)日：2023-07-18
申请号：US17337619
申请日：2021-06-03
发明人： Xilin Liu , Nitz Saputra , Behnam Sedighi , Ashok Swaminathan , Dongwon Seo
摘要： Methods and apparatus for adaptively generating a reference voltage (VREF) for biasing a switch driver and corresponding switch in a digital-to-analog converter (DAC). The adaptive biasing scheme may be capable of tracking process, voltage, and temperature (PVT) of the DAC. An example DAC generally includes a plurality of DAC cells, each DAC cell comprising a current source, a switch coupled in series with the current source, and a switch driver coupled to a control input of the switch, the switch driver being configured to receive power from a first power supply rail referenced to a reference potential node; a regulation circuit comprising a first transistor coupled between the reference potential node for the DAC and the switch driver in at least one of the plurality of DAC cells; and a VREF generation circuit coupled to the regulation circuit and configured to adaptively generate a VREF for the regulation circuit.
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公开(公告)号：US11621716B1
公开(公告)日：2023-04-04
申请号：US17448461
申请日：2021-09-22
摘要： Certain aspects of the present disclosure generally relate to circuitry and techniques for digital-to-analog conversion. One example device for digital-to-analog conversion generally includes: a digital-to-analog converter (DAC) having an input coupled to an input node of the device; a first return-to-zero (RZ) DAC having an input coupled to an input node of the device; and a combiner, wherein an output of the first DAC is coupled to a first input of the combiner, and wherein an output of the first RZ DAC is coupled to a second input of the combiner.
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