公开(公告)号：US10043318B2

公开(公告)日：2018-08-07

申请号：US15374165

申请日：2016-12-09

Applicant: QUALCOMM Incorporated

Inventor： Moinul Khan ,  Nhon Quach ,  Martin Renschler ,  Ramesh Chandrasekhar ,  Assaf Menachem ,  Ning Bi ,  Maurice Ribble

IPC: G09G5/10 ,  G06T19/00 ,  G06T7/20 ,  G06F3/01 ,  G06T3/00 ,  G06T5/00 ,  G06T11/60 ,  G06T1/60

Abstract: Certain aspects of the present disclosure provide methods and apparatus for operating a wearable display device. Certain aspects of the present disclosure provide a method for operating a wearable display device. The method includes determining a position of the wearable display device based on a motion sensor. The method includes rendering, by a graphics processing unit, an image based on the determined position. The method includes determining a first updated position of the wearable display device based on the motion sensor. The method includes warping, by a warp engine, a first portion of the rendered image based on the first updated position. The method includes displaying the warped first portion of the rendered image on a display of the wearable display device.

公开(公告)号：US20160019158A1

公开(公告)日：2016-01-21

申请号：US14334010

申请日：2014-07-17

Applicant: QUALCOMM Incorporated

Inventor： Subbarao Palacharla ,  Moinul Khan ,  Alain Artieri ,  Kedar Bhole ,  Vinod Chamarty ,  Yanru Li ,  Raghu Sankuratri ,  George Patsilaras ,  Pavan Kumar Thirunagari ,  Andrew Edward Turner ,  Jeong-Ho Woo

IPC: G06F12/08

CPC classification number: G06F12/0893 ,  G06F1/3203 ,  G06F1/3275 ,  G06F1/3287 ,  G06F9/50 ,  G06F12/084 ,  G06F12/0864 ,  G06F12/0888 ,  G06F12/0895 ,  G06F17/30902 ,  G06F2212/1028 ,  G06F2212/1044 ,  G06F2212/152 ,  G06F2212/601 ,  G06F2212/6042 ,  Y02D10/13

Abstract: Aspects include computing devices, systems, and methods for dynamically partitioning a system cache by sets and ways into component caches. A system cache memory controller may manage the component caches and manage access to the component caches. The system cache memory controller may receive system cache access requests and reserve locations in the system cache corresponding to the component caches correlated with component cache identifiers of the requests. Reserving locations in the system cache may activate the locations in the system cache for use by a requesting client, and may also prevent other client from using the reserved locations in the system cache. Releasing the locations in the system cache may deactivate the locations in the system cache and allow other clients to use them. A client reserving locations in the system cache may change the amount of locations it has reserved within its component cache.

Abstract translation: 方面包括计算设备，系统和方法，用于通过集合和方式动态地将系统高速缓存分区到组件高速缓存中。 系统高速缓冲存储器控制器可以管理组件高速缓存并管理对组件高速缓存的访问。 系统高速缓冲存储器控制器可以接收系统高速缓存访​​问请求，并且在系统高速缓存中保留对应于与请求的组件高速缓存标识符相关联的组件高速缓存的位 在系统缓存中预留位置可以激活系统高速缓存中的位置以供请求客户端使用，并且还可以防止其他客户端使用系统高速缓存中的保留位置。 释放系统缓存中的位置可以停用系统缓存中的位置，并允许其他客户端使用它们。 保留系统缓存中的位置的客户端可以改变其在其组件高速缓存中保留的位置的数量。

公开(公告)号：US10957093B2

公开(公告)日：2021-03-23

申请号：US16674669

申请日：2019-11-05

Applicant: QUALCOMM Incorporated

Inventor： Mehrad Tavakoli ,  Moinul Khan ,  Martin Renschler ,  Mriganka Mondal

IPC: G06T15/00 ,  G06F3/01 ,  G06T3/00 ,  G06K9/00

Abstract: An apparatus is configured to render graphics content to reduce latency of the graphics content. The apparatus includes a display configured to present graphics content including a first portion corresponding to an area of interest and further including a second portion. The apparatus further includes a fovea estimation engine configured to generate an indication of the area of interest based on scene information related to the graphics content. The apparatus further includes a rendering engine responsive to the fovea estimation engine. The rendering engine is configured to perform a comparison of a first result of an evaluation metric on part of the area of interest with a second result of the evaluation metric with another part of the area of interest. The rendering engine is further configured to render the graphics content using predictive adjustment to reduce latency based on the comparison.

公开(公告)号：US10180908B2

公开(公告)日：2019-01-15

申请号：US14710693

申请日：2015-05-13

Applicant: QUALCOMM Incorporated

Inventor： Yanru Li ,  Subbarao Palacharla ,  Moinul Khan ,  Alain Artieri ,  Azzedine Touzni

IPC: G06F12/08 ,  G06F12/10 ,  G06F12/0888 ,  G06F12/084 ,  G06F12/0893 ,  G06F12/0895 ,  G06F12/1045

Abstract: Aspects include computing devices, systems, and methods for implementing a cache maintenance or status operation for a component cache of a system cache. A computing device may generate a component cache configuration table, assign at least one component cache indicator of a component cache to a master of the component cache, and map at least one control register to the component cache indicator by a centralized control entity. The computing device may store the component cache indicator such that the component cache indicator is accessible by the master of the component cache for discovering a virtualized view of the system cache and issuing a cache maintenance or status command for the component cache bypassing the centralized control entity. The computing device may receive the cache maintenance or status command by a control register associated with a cache maintenance or status command and the component cache bypassing the centralized control entity.

公开(公告)号：US10089238B2

公开(公告)日：2018-10-02

申请号：US14334010

申请日：2014-07-17

Applicant: QUALCOMM Incorporated

Inventor： Subbarao Palacharla ,  Moinul Khan ,  Alain Artieri ,  Kedar Bhole ,  Vinod Chamarty ,  Yanru Li ,  Raghu Sankuratri ,  George Patsilaras ,  Pavan Kumar Thirunagari ,  Andrew Edmund Turner ,  Jeong-Ho Woo

IPC: G06F12/00 ,  G06F12/0893 ,  G06F12/084 ,  G06F12/0895 ,  G06F9/50 ,  G06F12/0888 ,  G06F12/0864 ,  G06F1/32 ,  G06F17/30

Abstract: Aspects include computing devices, systems, and methods for dynamically partitioning a system cache by sets and ways into component caches. A system cache memory controller may manage the component caches and manage access to the component caches. The system cache memory controller may receive system cache access requests and reserve locations in the system cache corresponding to the component caches correlated with component cache identifiers of the requests. Reserving locations in the system cache may activate the locations in the system cache for use by a requesting client, and may also prevent other client from using the reserved locations in the system cache. Releasing the locations in the system cache may deactivate the locations in the system cache and allow other clients to use them. A client reserving locations in the system cache may change the amount of locations it has reserved within its component cache.

公开(公告)号：US09606769B2

公开(公告)日：2017-03-28

申请号：US14304611

申请日：2014-06-13

Applicant: QUALCOMM INCORPORATED

Inventor： Moinul Khan ,  Chia-Yuan Teng ,  Simo Petteri Kangaslampi

IPC: G06F13/36 ,  G06F5/12 ,  G06F13/16 ,  G11C7/10 ,  H03M7/30

CPC classification number: G06F5/12 ,  G06F13/1673 ,  G11C7/1072 ,  H03M7/30 ,  H03M7/6064 ,  H03M7/6088 ,  H03M7/6094 ,  Y02D10/14

Abstract: Systems and methods for adaptive compression mode selection for memory buffers such as those used in or with a portable computing device (“PCD”) are presented. During operation of the PCD a first compression mode is selected for a buffer and the buffer is formatted to the first compression mode. Any access to the buffer by a component of the PCD, core of the PCD or software application running on the PCD is monitored. Based on the amount and/or type of access to the buffer, a second compression mode for the buffer is selected. The buffer is formatted to the second compression mode, providing a cost effective ability to adaptively format buffers based on the component(s), cores(s), and/or software application(s) accessing the buffers, and allowing for improving or optimizing bandwidth, memory footprint, resource conflict, power consumption, latency, and/or performance of component(s), core(s), or software application(s) accessing buffers as desired.

公开(公告)号：US10609418B2

公开(公告)日：2020-03-31

申请号：US15490620

申请日：2017-04-18

Applicant: QUALCOMM INCORPORATED

Inventor： Serag Gadelrab ,  Chinchuan Chiu ,  Moinul Khan ,  Kyle Ernewein ,  Tom Longo ,  Simon Booth ,  Meghal Varia ,  Milivoje Aleksic

IPC: H04N19/85 ,  H04N19/103 ,  H04N19/176 ,  H04N19/156 ,  H04N19/172 ,  H04N19/146 ,  H04N19/152 ,  H04N19/117

Abstract: An exemplary method for intelligent compression defines a threshold value for a temperature reading generated by a temperature sensor. Data blocks received into the compression module are compressed according to either a first mode or a second mode, the selection of which is determined based on a comparison of the active level for the temperature reading to the defined threshold value. The first compression mode may be associated with a lossless compression algorithm while the second compression mode is associated with a lossy compression algorithm. Or, both the first compression mode and the second compression mode may be associated with a lossless compression algorithm, however, for the first compression mode the received data blocks are produced at a default high quality level setting while for the second compression mode the received data blocks are produced at a reduced quality level setting.

公开(公告)号：US10482648B2

公开(公告)日：2019-11-19

申请号：US15377488

申请日：2016-12-13

Applicant: QUALCOMM Incorporated

Inventor： Mehrad Tavakoli ,  Moinul Khan ,  Martin Renschler ,  Mriganka Mondal

IPC: G06T15/00 ,  G06F3/01 ,  G06K9/00 ,  G06T3/00

Abstract: An apparatus is configured to render graphics content to reduce latency of the graphics content. The apparatus includes a display configured to present graphics content including a first portion corresponding to an area of interest and further including a second portion. The apparatus further includes a fovea estimation engine configured to generate an indication of the area of interest based on scene information related to the graphics content. The apparatus further includes a rendering engine responsive to the fovea estimation engine. The rendering engine is configured to perform a comparison of a first result of an evaluation metric on part of the area of interest with a second result of the evaluation metric with another part of the area of interest. The rendering engine is further configured to render the graphics content using predictive adjustment to reduce latency based on the comparison.

公开(公告)号：US20180165792A1

公开(公告)日：2018-06-14

申请号：US15377488

申请日：2016-12-13

Applicant: QUALCOMM Incorporated

Inventor： Mehrad Tavakoli ,  Moinul Khan ,  Martin Renschler ,  Mriganka Mondal

IPC: G06T3/40 ,  G06F3/01 ,  G06K9/46 ,  G06K9/62 ,  G06T15/00

CPC classification number: G06T15/00 ,  G06F3/013 ,  G06K9/00597 ,  G06T3/0012 ,  G06T2210/36

Abstract: An apparatus is configured to render graphics content to reduce latency of the graphics content. The apparatus includes a display configured to present graphics content including a first portion corresponding to an area of interest and further including a second portion. The apparatus further includes a fovea estimation engine configured to generate an indication of the area of interest based on scene information related to the graphics content. The apparatus further includes a rendering engine responsive to the fovea estimation engine. The rendering engine is configured to perform a comparison of a first result of an evaluation metric on part of the area of interest with a second result of the evaluation metric with another part of the area of interest. The rendering engine is further configured to render the graphics content using predictive adjustment to reduce latency based on the comparison.

公开(公告)号：US09858637B1

公开(公告)日：2018-01-02

申请号：US15253201

申请日：2016-08-31

Applicant: QUALCOMM INCORPORATED

Inventor： Nhon Quach ,  Moinul Khan ,  Maurice Ribble ,  Martin Renschler ,  Mehrad Tavakoli ,  Rashmi Kulkarni ,  Ricky Wai Kit Yuen ,  Todd Lemoine

IPC: G06F3/01 ,  G02B27/01 ,  G06T1/20 ,  G06T19/00 ,  G06F3/0346

CPC classification number: G06T1/20 ,  G02B27/017 ,  G02B2027/0147 ,  G02B2027/0178 ,  G02B2027/0187 ,  G06F3/011 ,  G06F3/012 ,  G06F3/013 ,  G06F3/0346 ,  G06T19/006

Abstract: Systems, methods, and computer programs are disclosed for reducing motion-to-photon latency and memory bandwidth in a virtual reality display system. An exemplary method involves receiving sensor data from one or more sensors tracking translational and rotational motion of a user for a virtual reality application. An updated position of the user is computed based on the received sensor data. The speed and acceleration of the user movement may be computed based on the sensor data. The updated position, the speed, and the acceleration may be provided to a warp engine configured to update a rendered image before sending to a virtual reality display based on one or more of the updated position, the speed, and the acceleration.