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公开(公告)号：US12249965B2
公开(公告)日：2025-03-11
申请号：US17808040
申请日：2022-06-21
Applicant: QUALCOMM Incorporated
Inventor： Marco Cassia , Jose Cabanillas
Abstract: Methods and apparatus for providing amplifier protection for a radio frequency (RF) front-end circuit. An example RF front-end circuit generally includes an amplifier with a gain, a first sensor configured to sense a first power (or voltage) of a first node coupled to an input of the amplifier, a second sensor configured to sense a second power (or voltage) of a second node coupled to an output of the amplifier, and logic coupled to the first and second sensors. The logic is generally configured to determine that the second power (or voltage) is outside a range based on the gain and the first power (or voltage) and to take an action to protect the amplifier based on the determination. By utilizing the techniques and apparatus described herein, protection can be provided to the amplifier(s) in an RF front-end circuit without significantly impacting the performance of the RF front-end circuit.
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公开(公告)号：US09467106B2
公开(公告)日：2016-10-11
申请号：US14931562
申请日：2015-11-03
Applicant: QUALCOMM Incorporated
Inventor： Jose Cabanillas , Calogero Davide Presti
CPC classification number: H03F3/245 , H03F1/0211 , H03F1/0222 , H03F1/0244 , H03F1/0266 , H03F1/223 , H03F1/483 , H03F3/193 , H03F2200/18 , H03F2200/21 , H03F2200/36 , H03F2201/3215
Abstract: The present disclosure includes circuits and methods for wideband biasing. In one embodiment, an amplifier includes a cascode transistor between an input and an output of the amplifier. The cascode transistor receives a bias from a bias circuit comprising a resistor between the power supply and a first node, a resistor between the first node and a reference voltage, and a capacitor between the power supply and the first node. The power supply may be a modulated power supply, which is coupled through the bias circuit to a capacitance at the control terminal of the cascode transistor. An inductor is configured between a terminal of the cascode transistor and the power supply. The inductor may isolate the output from the modulated supply signal.
Abstract translation: 本公开包括用于宽带偏置的电路和方法。 在一个实施例中，放大器包括在放大器的输入和输出之间的共源共栅晶体管。 共源共栅晶体管从包括电源和第一节点之间的电阻器，第一节点和参考电压之间的电阻器以及电源和第一节点之间的电容器的偏置电路接收偏置。 电源可以是调制电源，其通过偏置电路耦合到共源共栅晶体管的控制端的电容。 电感器配置在共源共栅晶体管的端子和电源之间。 电感器可以将输出与调制电源信号隔离开。
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公开(公告)号：US20140073267A1
公开(公告)日：2014-03-13
申请号：US13653030
申请日：2012-10-16
Applicant: QUALCOMM INCORPORATED
Inventor： Jose Cabanillas , Aristotele Hadjichristos , Per O. Kristensen , Mohan V. Puntambekar
IPC: H04B1/44
CPC classification number: H03H11/344 , H01P1/213 , H03H7/465 , H03H11/30 , H03H2007/386 , H04B1/0458
Abstract: Techniques to implement a filter for a selected signal path by reusing a circuit component in an unselected signal path are disclosed. In an exemplary design, an apparatus includes first, second, and third circuits. The first circuit passes a first radio frequency (RF) signal to an antenna when a first signal path is selected. The second circuit passes a second RF signal to the antenna when a second signal path is selected. The third circuit is selectively coupled to the first circuit, e.g., via a switch. The first and third circuits form a filter for the second RF signal (e.g., to attenuate a harmonic of the second RF signal) when the second signal path is selected and the first signal path is unselected. The first circuit may include a series inductor, and the third circuit may include a shunt capacitor.
Abstract translation: 公开了通过重新使用未选信号路径中的电路部件来实现所选信号路径的滤波器的技术。 在示例性设计中，装置包括第一，第二和第三电路。 当选择第一信号路径时，第一电路将第一射频（RF）信号传递到天线。 当选择第二信号路径时，第二电路将第二RF信号传递到天线。 第三电路例如经由开关选择性地耦合到第一电路。 当选择第二信号路径并且未选择第一信号路径时，第一和第三电路形成用于第二RF信号的滤波器（例如，衰减第二RF信号的谐波）。 第一电路可以包括串联电感器，并且第三电路可以包括并联电容器。
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公开(公告)号：US10122326B2
公开(公告)日：2018-11-06
申请号：US15472504
申请日：2017-03-29
Applicant: QUALCOMM Incorporated
Inventor： Jose Cabanillas
Abstract: A circuit including: a power amplifier configured to provide amplified signals to a load; an impedance matching network disposed between the power amplifier and the load, the impedance matching network comprising an adjustable impedance unit; and a feedback loop comprising a rectifier, the rectifier being coupled with an output of the power amplifier, the feedback loop further comprising and impedance control circuit configured to receive a signal from the rectifier and to control the adjustable impedance unit in response to the signal from the rectifier.
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公开(公告)号：US20180131333A1
公开(公告)日：2018-05-10
申请号：US15472504
申请日：2017-03-29
Applicant: QUALCOMM Incorporated
Inventor： Jose Cabanillas
CPC classification number: H03F1/56 , H03F1/0272 , H03F3/189 , H03F3/193 , H03F3/21 , H03F3/24 , H03F3/245 , H03F2200/102 , H03F2200/171 , H03F2200/387 , H03F2200/451 , H03F2200/78 , H04B1/0458
Abstract: A circuit including: a power amplifier configured to provide amplified signals to a load; an impedance matching network disposed between the power amplifier and the load, the impedance matching network comprising an adjustable impedance unit; and a feedback loop comprising a rectifier, the rectifier being coupled with an output of the power amplifier, the feedback loop further comprising and impedance control circuit configured to receive a signal from the rectifier and to control the adjustable impedance unit in response to the signal from the rectifier.
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Patent Agency Ranking
公开(公告)号：US09219447B2
公开(公告)日：2015-12-22
申请号：US14172150
申请日：2014-02-04
Applicant: QUALCOMM Incorporated
Inventor： Jose Cabanillas , Calogero Davide Presti
CPC classification number: H03F3/245 , H03F1/0211 , H03F1/0222 , H03F1/0244 , H03F1/0266 , H03F1/223 , H03F1/483 , H03F3/193 , H03F2200/18 , H03F2200/21 , H03F2200/36 , H03F2201/3215
Abstract: The present disclosure includes circuits and methods for wideband biasing. In one embodiment, an amplifiers includes a cascode transistor between an input and an output of the amplifier. The cascode transistor receives a bias from a bias circuit comprising a resistor between the power supply and a first node, a resistor between the first node and a reference voltage, and a capacitor between the power supply and the first node. The power supply may be a modulated power supply, which is coupled through the bias circuit to a capacitance at the control terminal of the cascode transistor. An inductor is configured between a terminal of the cascode transistor and the power supply. The inductor may isolate the output from the modulated supply signal.
Abstract translation: 本公开包括用于宽带偏置的电路和方法。 在一个实施例中，放大器包括在放大器的输入和输出之间的共源共栅晶体管。 共源共栅晶体管从包括电源和第一节点之间的电阻器，第一节点和参考电压之间的电阻器以及电源和第一节点之间的电容器的偏置电路接收偏置。 电源可以是调制电源，其通过偏置电路耦合到共源共栅晶体管的控制端的电容。 电感器配置在共源共栅晶体管的端子和电源之间。 电感器可以将输出与调制电源信号隔离开。
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公开(公告)号：US20150070095A1
公开(公告)日：2015-03-12
申请号：US14172150
申请日：2014-02-04
Applicant: QUALCOMM Incorporated
Inventor： Jose Cabanillas , Calogero Davide Presti
CPC classification number: H03F3/245 , H03F1/0211 , H03F1/0222 , H03F1/0244 , H03F1/0266 , H03F1/223 , H03F1/483 , H03F3/193 , H03F2200/18 , H03F2200/21 , H03F2200/36 , H03F2201/3215
Abstract: The present disclosure includes circuits and methods for wideband biasing. In one embodiment, an amplifiers includes a cascode transistor between an input and an output of the amplifier. The cascode transistor receives a bias from a bias circuit comprising a resistor between the power supply and a first node, a resistor between the first node and a reference voltage, and a capacitor between the power supply and the first node. The power supply may be a modulated power supply, which is coupled through the bias circuit to a capacitance at the control terminal of the cascode transistor. An inductor is configured between a terminal of the cascode transistor and the power supply. The inductor may isolate the output from the modulated supply signal.
Abstract translation: 本公开包括用于宽带偏置的电路和方法。 在一个实施例中，放大器包括在放大器的输入和输出之间的共源共栅晶体管。 共源共栅晶体管从包括电源和第一节点之间的电阻器，第一节点和参考电压之间的电阻器以及电源和第一节点之间的电容器的偏置电路接收偏置。 电源可以是调制电源，其通过偏置电路耦合到共源共栅晶体管的控制端的电容。 电感器配置在共源共栅晶体管的端子和电源之间。 电感器可以将输出与调制电源信号隔离开。
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公开(公告)号：US12267099B2
公开(公告)日：2025-04-01
申请号：US17655351
申请日：2022-03-17
Applicant: QUALCOMM Incorporated
Inventor： David Francis Berdy , Jin Cho , Yu Steve Zhao , Christian Holenstein , Ryan Scott Castro Spring , Jose Cabanillas , Euichan Moon
Abstract: In certain aspects, a system includes a first filter, a second filter, a dummy load, and a switching circuit coupled to the first filter, the second filter, and the dummy load, and coupled to a first antenna and a second antenna. In a first mode, the switching circuit couples the first filter and the second filter to the first antenna, and, in a second mode, the switching circuit couples the first filter and the third filter to the first antenna and couples the second filter to the second antenna. In certain aspects, the dummy load includes a third filter.
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公开(公告)号：US10218326B2
公开(公告)日：2019-02-26
申请号：US15583890
申请日：2017-05-01
Applicant: QUALCOMM Incorporated
Inventor： Jiang Chen , Jeremy Goldblatt , Jose Cabanillas
IPC: H03G3/00 , H03G3/30 , H03F1/56 , H03F3/193 , H03F3/21 , H03F1/02 , H03F1/32 , H03F3/189 , H03F1/22 , H03F3/24 , H03F3/45 , H03F3/50
Abstract: A power amplifier bias circuit with embedded envelope detection includes a bias circuit stage coupled to an envelope detector circuit to increases a bias provided to a power amplifier as a function of an incoming envelope signal. The envelope detector circuit includes a first source/emitter follower transistor, a current source, and a filter to generate a baseband envelope signal. The current source is coupled to an output node of the first source/emitter follower transistor and the filter is also coupled to the output node of the first source/emitter follower transistor. The bias circuit stage includes one or more replica transistors that replicate transistors of the power amplifier or power amplifier core stage, an envelope detector replica transistor and a replica of the current source of the envelope detector circuit.
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公开(公告)号：US10177723B2
公开(公告)日：2019-01-08
申请号：US15441500
申请日：2017-02-24
Applicant: QUALCOMM Incorporated
Inventor： Marco Cassia , Jose Cabanillas
IPC: H03F3/217 , H03F1/56 , H03F3/19 , H03F3/21 , H03F3/72 , H03G1/00 , H03F1/02 , H04B1/40 , H04B1/401
Abstract: A power amplifier circuit, including: an input node configured to receive a radio frequency (RF) signal; an output node configured to output an amplified RF signal; a main path switchably coupled between the input node and the output node, and including a first plurality of amplification stages to generate a first amplified RF signal; a bypass path switchably coupled between the input node and the output node, and including at least one second amplification stage to generate a second amplified RF signal; and a coupling switch configured to reuse at least a portion of the bypass path to drive the main path to generate a third amplified RF signal.
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