公开(公告)号：US20240421837A1

公开(公告)日：2024-12-19

申请号：US18335776

申请日：2023-06-15

Applicant: QUALCOMM Incorporated

Inventor： Guoxiang HAN ,  Paolo Enrico DE FALCO ,  Antonino SCUDERI

IPC: H04B1/04 ,  H03F1/02 ,  H03F3/24

Abstract: A phase-reconfigurable circuit with programmable power splitting for a dual-input power amplifier is provided. The circuit includes an I/Q generator to generate I and Q RF signals from an input RF signal. A first vector-sum phase-shifter processes the I and Q RF signals to produce a first RF output signal. Similarly, a second vector-sum phase-shifter processes the I and Q RF signals to produce a second RF output signal.

公开(公告)号：US20180315773A1

公开(公告)日：2018-11-01

申请号：US15581254

申请日：2017-04-28

Applicant: QUALCOMM INCORPORATED

Inventor： Ranadeep DUTTA ,  Antonino SCUDERI ,  Wing SY

IPC: H01L27/12 ,  H01L29/78 ,  H01L21/8238 ,  H01L23/66 ,  H03F3/195 ,  H03F3/24 ,  H03F1/22

CPC classification number: H01L27/1203 ,  H01L21/823418 ,  H01L21/823462 ,  H01L27/088 ,  H01L27/0922 ,  H01L27/1237 ,  H01L29/7824 ,  H03F1/223 ,  H03F3/195 ,  H03F3/245 ,  H03F2200/451

Abstract: An amplifier includes a cascode structure comprising a first transistor having first characteristics coupled to a second transistor having second characteristics different than the first characteristics, the first transistor formed with the second transistor on a single diffusion.

公开(公告)号：US20250096734A1

公开(公告)日：2025-03-20

申请号：US18471231

申请日：2023-09-20

Applicant: QUALCOMM Incorporated

Inventor： Sunbo SHIM ,  Guoxiang HAN ,  David Angel CALVILLO CORTES ,  Paolo Enrico DE FALCO ,  Antonino SCUDERI

IPC: H03F1/02 ,  H03F3/24

Abstract: A phase-reconfigurable circuit for a dual-input power amplifier is provided. The circuit includes an envelope detector configured to process an envelope of an RF input signal into an envelope signal. A first vector-sum phase-shifter and a second vector-sum phase-shifter processes an in-phase and a quadrature-phase version of the RF input signal with the envelope signal to produce a first differential output signal having a dynamically-modulated phase difference with a second differential output signal.

公开(公告)号：US20230054893A1

公开(公告)日：2023-02-23

申请号：US17404590

申请日：2021-08-17

Applicant: QUALCOMM Incorporated

Inventor： Lei MA ,  Wenyue Lydia ZHANG ,  Antonino SCUDERI ,  William Clinton Burling PEATMAN

IPC: H01L23/367 ,  H01L27/102 ,  H01L23/00

Abstract: Disclosed is a semiconductor device such as a power amplifier. Unlike conventional power amplifiers, thermal bump is patterned to only cover active devices. In this way, dimensions of the semiconductor device can be reduced.

公开(公告)号：US20190044481A1

公开(公告)日：2019-02-07

申请号：US15960191

申请日：2018-04-23

Applicant: QUALCOMM Incorporated

Inventor： Antonino SCUDERI ,  Thomas MARRA

IPC: H03F1/02 ,  H03F3/21 ,  H03F3/19 ,  H03F1/26

Abstract: A power supply to power amplifier (PA) distribution network may include a first power supply. The PA distribution network may further include at least one power amplifier. The power amplifier may be coupled to the first power supply. The power amplifier may include a driver stage and a power stage. The power amplifier may be coupled to the first power supply via a first switch.

公开(公告)号：US20240429907A1

公开(公告)日：2024-12-26

申请号：US18338685

申请日：2023-06-21

Applicant: QUALCOMM Incorporated

Inventor： Lei MA ,  Chenliang DU ,  Antonino SCUDERI

IPC: H03K5/08 ,  H03K5/02

Abstract: Certain aspects of the present disclosure are directed towards a signal processing circuit. The signal processing circuit generally includes: an impedance transformation circuit coupled between a first node and a second node; and an attenuation circuit including a first variable resistive element coupled between the first node and a reference potential node, and a second variable resistive element coupled between the second node and the reference potential node.

公开(公告)号：US20240429878A1

公开(公告)日：2024-12-26

申请号：US18338729

申请日：2023-06-21

Applicant: QUALCOMM Incorporated

Inventor： Lei MA ,  Antonino SCUDERI

IPC: H03F3/21 ,  H03F1/56

Abstract: Certain aspects of the present disclosure generally relate to an amplification circuit. The amplification circuit generally includes: a first amplification path comprising a first amplification transistor and coupled between an input node of the amplification circuit and an output node of the amplification circuit; and a second amplification path comprising a second amplification transistor and coupled between the input node and the output node, wherein the second amplification path further includes an attenuator coupled between the input node of the amplification circuit and a control input of the second amplification transistor.

公开(公告)号：US20240421774A1

公开(公告)日：2024-12-19

申请号：US18336902

申请日：2023-06-16

Applicant: QUALCOMM Incorporated

Inventor： Paolo Enrico DE FALCO ,  Tsu-Wei LIN ,  Ning ZHU ,  Antonino SCUDERI

IPC: H03F1/02 ,  H03F3/21

Abstract: A Doherty amplifier is provided with a lumped-element combiner that includes a first capacitor and an inductor. Should the inductor be coupled between an output terminal of the main amplifier and an output node of the Doherty amplifier, the first capacitor couples between an output terminal of the auxiliary amplifier and the output node. Conversely, if the first capacitor is coupled between the output terminal of the main amplifier and the output node, then the inductor couples between the output terminal of the auxiliary amplifier and the output node. A current scaling ratio of the Doherty amplifier ranges from 0.4 to 0.6 to enhance the bandwidth.

公开(公告)号：US20240429879A1

公开(公告)日：2024-12-26

申请号：US18339714

申请日：2023-06-22

Applicant: QUALCOMM Incorporated

Inventor： Paolo Enrico DE FALCO ,  Baseer FAHEEM ,  David Angel CALVILLO CORTES ,  Antonino SCUDERI

IPC: H03F3/21 ,  H03F1/02

Abstract: Certain aspects of the present disclosure generally relate to electronic components and, more particularly, to circuitry for signal amplification for transmission. One example apparatus generally includes: a modem; a controller; a feedforward path coupled between the modem and the bias controller; and an amplifier having a main amplification path and an auxiliary amplification path, wherein the controller is configured to provide at least one bias signal for biasing the auxiliary amplification path based on information associated with a transmission signal, the information being provided by the modem to the controller via the feedforward path.

公开(公告)号：US20230396219A1

公开(公告)日：2023-12-07

申请号：US17805168

申请日：2022-06-02

Applicant: QUALCOMM Incorporated

Inventor： Jiri STULEMEIJER ,  Christos KOMNINAKIS ,  Robert WILSON ,  Hakan INANOGLU ,  Ryan Scott Castro SPRING ,  Antonino SCUDERI ,  Michael Lee MCCLOUD

IPC: H03F3/24 ,  H03F1/02 ,  H03F1/32

CPC classification number: H03F3/245 ,  H03F1/0227 ,  H03F1/3247 ,  H03F2200/451 ,  H03F2200/105 ,  H03F2201/3233

Abstract: Aspects of the present disclosure provide signal amplification. An example method generally includes amplifying a version of a first input signal with a power amplifier in a first state where a bias voltage of the power amplifier is set to a first voltage based on a first tracking mode; obtaining a first output signal of the power amplifier in a second state where the bias voltage is set to a second voltage less than the first voltage; determining a predistortion associated with the power amplifier based at least in part on the obtained first output signal; applying the predistortion to the first input signal; and amplifying a version of the predistorted first input signal with the power amplifier in a third state where the bias voltage is set to a third voltage based on a second tracking mode, wherein the third voltage is less than the first voltage.