Semiconductor package and lead frame therefor
    2.
    发明授权
    Semiconductor package and lead frame therefor 有权
    半导体封装和引线框架

    公开(公告)号:US08643158B2

    公开(公告)日:2014-02-04

    申请号:US13413652

    申请日:2012-03-07

    Abstract: A semiconductor package is assembled using first and second lead frames. The first lead frame includes a die flag and the second lead frame includes lead fingers. When the first and second lead frames are mated, the lead fingers surround the die flag. Side surfaces of the die flag are partially etched to form an extended die attach surface on the die flag, and portions of the top surface of each of the lead fingers also are partially etched to form lead finger surfaces that are complementary with the etched side surfaces of the die flag. A semiconductor die is attached to the extended die attach surface and bond pads of the semiconductor die are electrically connected to the lead fingers. An encapsulating material covers the die, electrical connections, and top surfaces of the die flag and lead fingers.

    Abstract translation: 使用第一和第二引线框组装半导体封装。 第一引线框架包括管芯标记,并且第二引线框架包括引线指。 当第一和第二引线框架配合时,引线指环围绕管芯标记。 模具标记的侧表面被部分蚀刻以在模具标记上形成延伸的芯片附接表面,并且每个引线指的顶表面的部分也被部分地蚀刻以形成与蚀刻的侧表面互补的引线指表面 的旗帜。 半导体管芯附着到延伸管芯附接表面,并且半导体管芯的接合焊盘电连接到引线指。 封装材料覆盖管芯标记和引线指的管芯,电连接和顶表面。

    Semiconductor device with nested rows of contacts
    3.
    发明授权
    Semiconductor device with nested rows of contacts 有权
    具有嵌套行触点的半导体器件

    公开(公告)号:US08080448B1

    公开(公告)日:2011-12-20

    申请号:US13092170

    申请日:2011-04-22

    Abstract: A method of making semiconductor devices includes producing an array of first lead frames having rows of first electrical contact elements on respective sides. Sub-assemblies are produced by applying a first molding compound peripherally to provide support between the first electrical contact elements of each of the first lead frames, and singulating the sub-assemblies. An array of assemblies is produced, each of which includes a second lead frame having rows of second electrical contact elements on respective sides, a respective one of the sub-assemblies disposed in the second lead frame with the rows of first electrical contact elements nested adjacent to and inside the rows of second electrical contact elements, and a semiconductor die mounted on the sub-assembly. The assemblies are encapsulated using a second molding compound with the rows of first and second electrical contact elements exposed on adjacent sides of an active face of the respective assembly.

    Abstract translation: 一种制造半导体器件的方法包括制造具有在相应侧面上具有第一电接触元件行的第一引线框阵列。 子组件通过在周边施加第一模塑料以在第一引线框架中的每一个的第一电接触元件之间提供支撑并且分割子组件来制造。 产生一组组件,每个组件包括在相应侧面上具有一列第二电接触元件的第二引线框架,设置在第二引线框架中的相应的一个子组件,第一电接触元件列嵌套在相邻 第二电接触元件的行内和内部,以及安装在子组件上的半导体管芯。 使用第二模制化合物封装组件,其中第一和第二电接触元件排暴露在相应组件的有效面的相邻侧上。

    SEMICONDUCTOR PACKAGE AND LEAD FRAME THEREFOR
    4.
    发明申请
    SEMICONDUCTOR PACKAGE AND LEAD FRAME THEREFOR 有权
    半导体封装和引线框架

    公开(公告)号:US20120248590A1

    公开(公告)日:2012-10-04

    申请号:US13413652

    申请日:2012-03-07

    Abstract: A semiconductor package is assembled using first and second lead frames. The first lead frame includes a die flag and the second lead frame includes lead fingers. When the first and second lead frames are mated, the lead fingers surround the die flag. Side surfaces of the die flag are partially etched to form an extended die attach surface on the die flag, and portions of the top surface of each of the lead fingers also are partially etched to form lead finger surfaces that are complementary with the etched side surfaces of the die flag. A semiconductor die is attached to the extended die attach surface and bond pads of the semiconductor die are electrically connected to the lead fingers. An encapsulating material covers the die, electrical connections, and top surfaces of the die flag and lead fingers.

    Abstract translation: 使用第一和第二引线框组装半导体封装。 第一引线框架包括管芯标记,并且第二引线框架包括引线指。 当第一和第二引线框架配合时,引线指环围绕管芯标记。 模具标记的侧表面被部分蚀刻以在模具标记上形成延伸的芯片附接表面,并且每个引线指的顶表面的部分也被部分地蚀刻以形成与蚀刻的侧表面互补的引线指表面 的旗帜。 半导体管芯附着到延伸管芯附接表面,并且半导体管芯的接合焊盘电连接到引线指。 封装材料覆盖管芯标记和引线指的管芯,电连接和顶表面。

    Packaged integrated circuit device having bent leads
    6.
    发明授权
    Packaged integrated circuit device having bent leads 有权
    具有弯曲引线的封装集成电路器件

    公开(公告)号:US09177836B1

    公开(公告)日:2015-11-03

    申请号:US14554065

    申请日:2014-11-26

    Abstract: A method for assembling a quad flat no-lead (QFN) device includes mounting and electrically connecting a die to a pre-plated lead frame (PPF) to form a sub-assembly, where the plating is solder-wettable and the lead frame has notches in the lead fingers located along the device boundary. The sub-assembly is then encapsulated to (1) leave the distal ends of the lead fingers exposed and (2) have the edge of the encapsulant adjacent to the notches. The sub-assembly is then singulated to leave distal lead segments protruding from the resulting device. The protruding exposed segments are then bent to be substantially parallel to the device sidewalls. Consequently, the plated surface of each lead extends along portions of both the bottom and one side of the device.

    Abstract translation: 用于组装四边形无引线(QFN)器件的方法包括将管芯安装并电连接到预镀引线框架(PPF),以形成子组件,其中电镀可焊接润湿,并且引线框具有 引线指沿设备边界的凹口。 然后将子组件封装成(1)使引线的远端露出,(2)使密封剂的边缘邻近凹口。 然后将子组件分开以使远离的引导部分从所得到的装置突出。 突出的暴露的段然后被弯曲成基本上平行于器件侧壁。 因此,每个引线的电镀表面沿设备的底部和一侧的部分延伸。

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