公开(公告)号：US20110165729A1

公开(公告)日：2011-07-07

申请号：US12830424

申请日：2010-07-05

Applicant: Peng LIU ,  Xu Gao ,  Qingchun He ,  Zhaobin Qi ,  Dehong Ye

Inventor： Peng LIU ,  Xu Gao ,  Qingchun He ,  Zhaobin Qi ,  Dehong Ye

IPC: H01L21/78 ,  H01L21/98 ,  H01L21/60

CPC classification number: H01L23/3107 ,  H01L21/4842 ,  H01L23/49558 ,  H01L23/49582 ,  H01L24/29 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/0665 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Quad Flat No-Lead packaged devices are manufactured using two singulation operations with two different saw blades of varying widths with the first singulation operation using a wider saw blade than the second singulation operation. Between singulation operations, the exposed portions of the leads are plated with a solderable metal. By performing the second singulation operation within the first cut made by the first singulation, at least half of the exposed metal of the leads remains plated. Thus, better solder joints may be formed, which allows for simpler visual inspection.

Abstract translation: 使用具有不同宽度的两个不同锯片的两个单独操作制造四边形无铅封装装置，其中使用比第二单分割操作更宽的锯片进行第一次分割操作。 在切割操作之间，引线的暴露部分镀有可焊接的金属。 通过在由第一单片化制成的第一切割内进行第二切割操作，引线的裸露金属的至少一半保持镀覆。 因此，可以形成更好的焊点，这允许更简单的目视检查。

公开(公告)号：US20140246767A1

公开(公告)日：2014-09-04

申请号：US14077174

申请日：2013-11-11

Applicant: Peng Liu ,  Qingchun He ,  Zhaobin Qi ,  Liqiang Xu ,  Tong Zhao

Inventor： Peng Liu ,  Qingchun He ,  Zhaobin Qi ,  Liqiang Xu ,  Tong Zhao

IPC: H01L23/495 ,  H01L25/00

CPC classification number: H01L23/49575 ,  H01L23/49503 ,  H01L23/4952 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/50 ,  H01L2224/27013 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/73265 ,  H01L2224/78313 ,  H01L2924/0002 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/014

Abstract: A semiconductor device includes a lead frame having a down bond area, a die attach area and a dam formed between the down bond area and the die attach area. A bottom of the dam is attached on a surface of the lead frame. The dam prevents contamination of the down bond area from die attach material, which may occur during a die attach process.

Abstract translation: 半导体器件包括具有下焊接区域的引线框架，管芯附着区域和形成在下焊接区域和管芯附着区域之间的坝。 大坝的底部附着在引线框架的表面上。 大坝可防止下模接合区域从芯片附着材料中的污染，这可能在芯片附着过程中发生。

公开(公告)号：US08969135B2

公开(公告)日：2015-03-03

申请号：US14077174

申请日：2013-11-11

Applicant: Peng Liu ,  Qingchun He ,  Zhaobin Qi ,  Liqiang Xu ,  Tong Zhao

Inventor： Peng Liu ,  Qingchun He ,  Zhaobin Qi ,  Liqiang Xu ,  Tong Zhao

IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L23/495 ,  H01L25/00

CPC classification number: H01L23/49575 ,  H01L23/49503 ,  H01L23/4952 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/50 ,  H01L2224/27013 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/73265 ,  H01L2224/78313 ,  H01L2924/0002 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/014

Abstract: A semiconductor device includes a lead frame having a down bond area, a die attach area and a dam formed between the down bond area and the die attach area. A bottom of the dam is attached on a surface of the lead frame. The dam prevents contamination of the down bond area from die attach material, which may occur during a die attach process.

Abstract translation: 半导体器件包括具有下焊接区域的引线框架，管芯附着区域和形成在下焊接区域和管芯附着区域之间的坝。 大坝的底部附着在引线框架的表面上。 大坝可防止下模接合区域从芯片附着材料中的污染，这可能在芯片附着过程中发生。

公开(公告)号：US20150235969A1

公开(公告)日：2015-08-20

申请号：US14551098

申请日：2014-11-24

Applicant: Hanmin Zhang ,  Qingchun He ,  Dehong Ye ,  Fei Zong

Inventor： Hanmin Zhang ,  Qingchun He ,  Dehong Ye ,  Fei Zong

IPC: H01L23/00 ,  H01L21/78

CPC classification number: H01L23/562 ,  H01L21/78 ,  H01L22/12 ,  H01L24/05 ,  H01L24/94 ,  H01L2224/033 ,  H01L2224/034 ,  H01L2224/0345 ,  H01L2224/036 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05555 ,  H01L2224/05564 ,  H01L2224/131 ,  H01L2224/94 ,  H01L2224/03 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A semiconductor wafer having multiple dies has a partially metallized backside. After wafer dicing, each of the multiple dies has, on its backside, a metallized area surrounded by a peripheral non-metallization ring. The non-metallization ring allows for easier optical inspection of the dies for determining the extent of any backside chipping caused by the wafer dicing. The peripheral non-metallization rings are generated by not metalizing the areas flanking the saw streets of the wafer.

Abstract translation: 具有多个管芯的半导体晶片具有部分金属化的背面。 在晶片切割之后，多个管芯中的每一个在其背面具有被外围非金属化环包围的金属化区域。 非金属化环允许更容易地对模具进行光学检查，以确定由晶片切割引起的任何背面切屑的程度。 周边的非金属化环是通过不使晶片的锯条的两侧的区域金属化而产生的。

公开(公告)号：US20110065240A1

公开(公告)日：2011-03-17

申请号：US12578556

申请日：2009-10-13

Applicant: Xu GAO ,  Qingchun He ,  Nan Xu

Inventor： Xu GAO ,  Qingchun He ,  Nan Xu

IPC: H01L21/60 ,  H01L23/495 ,  B21D31/02

CPC classification number: H01L21/4842 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/49541 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/48247 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A lead frame and a method of making a lead frame for a semiconductor package. The lead frame is formed by stamping a lead frame material into a desire configuration. The stamped lead frame is then affixed to a support material. When assembling a semiconductor package using the lead frame, during saw singuation, the saw does not have to cut through much lead frame material. Thus, the saw blade does not wear quickly.

Abstract translation: 引线框架和制造用于半导体封装的引线框架的方法。 引线框架通过将引线框架材料冲压成期望配置而形成。 然后将冲压的引线框架固定到支撑材料上。 当使用引线框组装半导体封装时，在锯切时，锯不必切割大量的引线框架材料。 因此，锯片不会很快磨损。

公开(公告)号：US20160141230A1

公开(公告)日：2016-05-19

申请号：US14677964

申请日：2015-04-02

Applicant: Peng Liu ,  Qingchun He ,  Ping Wu

Inventor： Peng Liu ,  Qingchun He ,  Ping Wu

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L23/49551 ,  H01L21/4825 ,  H01L21/4842 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/49541 ,  H01L23/49548 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/92 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device includes a lead frame having a die support area and a plurality of inner and outer row leads surrounding the die support area, and a semiconductor die mounted on the die support area and electrically connected to the leads with bond wires. A molding material encapsulates the semiconductor die, the bond wires, and the leads, and defines a package body. The semiconductor device further includes connection bars extending vertically from the leads to a top surface of the package body. The connection bars connect the inner row leads to respective ones of the outer row leads before the molding process is performed.

Abstract translation: 一种半导体器件包括具有管芯支撑区域的引线框架和围绕模具支撑区域的多个内部和外部引线引线，以及安装在管芯支撑区域上并与引线电连接的引线的半导体管芯。 成型材料封装半导体管芯，接合线和引线，并且限定封装主体。 半导体器件还包括从引线垂直延伸到封装主体的顶表面的连接杆。 在执行模制过程之前，连接杆将内排引线连接到相应的外排引线。

公开(公告)号：US08643158B2

公开(公告)日：2014-02-04

申请号：US13413652

申请日：2012-03-07

Applicant: Peng Liu ,  Qingchun He ,  Ping Wu

Inventor： Peng Liu ,  Qingchun He ,  Ping Wu

IPC: H01L23/495 ,  H01L21/56

CPC classification number: H01L23/49537 ,  H01L21/4828 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49548 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45565 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A semiconductor package is assembled using first and second lead frames. The first lead frame includes a die flag and the second lead frame includes lead fingers. When the first and second lead frames are mated, the lead fingers surround the die flag. Side surfaces of the die flag are partially etched to form an extended die attach surface on the die flag, and portions of the top surface of each of the lead fingers also are partially etched to form lead finger surfaces that are complementary with the etched side surfaces of the die flag. A semiconductor die is attached to the extended die attach surface and bond pads of the semiconductor die are electrically connected to the lead fingers. An encapsulating material covers the die, electrical connections, and top surfaces of the die flag and lead fingers.

Abstract translation: 使用第一和第二引线框组装半导体封装。 第一引线框架包括管芯标记，并且第二引线框架包括引线指。 当第一和第二引线框架配合时，引线指环围绕管芯标记。 模具标记的侧表面被部分蚀刻以在模具标记上形成延伸的芯片附接表面，并且每个引线指的顶表面的部分也被部分地蚀刻以形成与蚀刻的侧表面互补的引线指表面 的旗帜。 半导体管芯附着到延伸管芯附接表面，并且半导体管芯的接合焊盘电连接到引线指。 封装材料覆盖管芯标记和引线指的管芯，电连接和顶表面。

公开(公告)号：US08080448B1

公开(公告)日：2011-12-20

申请号：US13092170

申请日：2011-04-22

Applicant: Ping Wu ,  Qingchun He ,  Peng Liu

Inventor： Ping Wu ,  Qingchun He ,  Peng Liu

IPC: H01L21/00

CPC classification number: H01L23/49537 ,  H01L23/3107 ,  H01L23/49541 ,  H01L23/49558 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of making semiconductor devices includes producing an array of first lead frames having rows of first electrical contact elements on respective sides. Sub-assemblies are produced by applying a first molding compound peripherally to provide support between the first electrical contact elements of each of the first lead frames, and singulating the sub-assemblies. An array of assemblies is produced, each of which includes a second lead frame having rows of second electrical contact elements on respective sides, a respective one of the sub-assemblies disposed in the second lead frame with the rows of first electrical contact elements nested adjacent to and inside the rows of second electrical contact elements, and a semiconductor die mounted on the sub-assembly. The assemblies are encapsulated using a second molding compound with the rows of first and second electrical contact elements exposed on adjacent sides of an active face of the respective assembly.

Abstract translation: 一种制造半导体器件的方法包括制造具有在相应侧面上具有第一电接触元件行的第一引线框阵列。 子组件通过在周边施加第一模塑料以在第一引线框架中的每一个的第一电接触元件之间提供支撑并且分割子组件来制造。 产生一组组件，每个组件包括在相应侧面上具有一列第二电接触元件的第二引线框架，设置在第二引线框架中的相应的一个子组件，第一电接触元件列嵌套在相邻 第二电接触元件的行内和内部，以及安装在子组件上的半导体管芯。 使用第二模制化合物封装组件，其中第一和第二电接触元件排暴露在相应组件的有效面的相邻侧上。

公开(公告)号：US20120248590A1

公开(公告)日：2012-10-04

申请号：US13413652

申请日：2012-03-07

Applicant: Peng LIU ,  Qingchun He ,  Ping Wu

Inventor： Peng LIU ,  Qingchun He ,  Ping Wu

IPC: H01L23/495 ,  H01L21/56

CPC classification number: H01L23/49537 ,  H01L21/4828 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49548 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45565 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A semiconductor package is assembled using first and second lead frames. The first lead frame includes a die flag and the second lead frame includes lead fingers. When the first and second lead frames are mated, the lead fingers surround the die flag. Side surfaces of the die flag are partially etched to form an extended die attach surface on the die flag, and portions of the top surface of each of the lead fingers also are partially etched to form lead finger surfaces that are complementary with the etched side surfaces of the die flag. A semiconductor die is attached to the extended die attach surface and bond pads of the semiconductor die are electrically connected to the lead fingers. An encapsulating material covers the die, electrical connections, and top surfaces of the die flag and lead fingers.

Abstract translation: 使用第一和第二引线框组装半导体封装。 第一引线框架包括管芯标记，并且第二引线框架包括引线指。 当第一和第二引线框架配合时，引线指环围绕管芯标记。 模具标记的侧表面被部分蚀刻以在模具标记上形成延伸的芯片附接表面，并且每个引线指的顶表面的部分也被部分地蚀刻以形成与蚀刻的侧表面互补的引线指表面 的旗帜。 半导体管芯附着到延伸管芯附接表面，并且半导体管芯的接合焊盘电连接到引线指。 封装材料覆盖管芯标记和引线指的管芯，电连接和顶表面。

公开(公告)号：US09355944B1

公开(公告)日：2016-05-31

申请号：US14677964

申请日：2015-04-02

Applicant: Peng Liu ,  Qingchun He ,  Ping Wu

Inventor： Peng Liu ,  Qingchun He ,  Ping Wu

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/49551 ,  H01L21/4825 ,  H01L21/4842 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/49541 ,  H01L23/49548 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/92 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device includes a lead frame having a die support area and a plurality of inner and outer row leads surrounding the die support area, and a semiconductor die mounted on the die support area and electrically connected to the leads with bond wires. A molding material encapsulates the semiconductor die, the bond wires, and the leads, and defines a package body. The semiconductor device further includes connection bars extending vertically from the leads to a top surface of the package body. The connection bars connect the inner row leads to respective ones of the outer row leads before the molding process is performed.

Abstract translation: 一种半导体器件包括具有管芯支撑区域的引线框架和围绕模具支撑区域的多个内部和外部引线引线，以及安装在管芯支撑区域上并与引线电连接的引线的半导体管芯。 成型材料封装半导体管芯，接合线和引线，并且限定封装主体。 半导体器件还包括从引线垂直延伸到封装主体的顶表面的连接杆。 在执行模制过程之前，连接杆将内排引线连接到相应的外排引线。