-
公开(公告)号：US12219155B2
公开(公告)日：2025-02-04
申请号：US18591350
申请日：2024-02-29
Inventor： Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Ryuichi Kanoh , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Jing Ya Li
IPC: H04N19/159 , H04N19/119 , H04N19/139 , H04N19/513
Abstract: An encoder encodes a video, and includes: circuitry; and memory coupled to the circuitry. Using the memory, the circuitry: obtains at least two items of prediction information for a first partition included in the video; derives at least one template from neighboring samples which neighbor the first partition; calculates at least two costs, using the at least one template and the at least two items of prediction information; using the at least two costs, (i) determines at least one splitting direction for the first partition or (ii) assigns one of the at least two items of prediction information to a second partition split from the first partition according to the splitting direction, and another thereof to a third partition split from the first partition according to the splitting direction; and encodes the first partition according to the splitting direction and the at least two items of prediction information.
-
公开(公告)号：US12206906B2
公开(公告)日：2025-01-21
申请号：US18484292
申请日：2023-10-10
Inventor： Chong Soon Lim , Hai Wei Sun , Han Boon Teo , Jing Ya Li , Che-Wei Kuo , Tadamasa Toma , Takahiro Nishi , Kiyofumi Abe , Yusuke Kato
IPC: H04N19/82 , H04N19/119 , H04N19/176 , H04N19/593
Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry determines whether to split a current luma virtual pipeline decoding unit (VPDU) into smaller blocks. When it is determined not to split the current luma VPDU into smaller blocks, the circuitry predicts a block of chroma samples without using luma samples. When it is determined to split the luma VPDU into smaller blocks, the circuitry predicts the block of chroma samples using luma samples. The circuitry encodes the block using the predicted chroma samples.
-
公开(公告)号：US12200270B2
公开(公告)日：2025-01-14
申请号：US17589419
申请日：2022-01-31
Inventor： Jing Ya Li , Chong Soon Lim , Han Boon Teo , Hai Wei Sun , Che-Wei Kuo , Chu Tong Wang , Tadamasa Toma , Takahiro Nishi , Kiyofumi Abe , Yusuke Kato
IPC: H04N19/82 , H04N19/105 , H04N19/109 , H04N19/11 , H04N19/117 , H04N19/119 , H04N19/12 , H04N19/124 , H04N19/13 , H04N19/132 , H04N19/157 , H04N19/172 , H04N19/176 , H04N19/18 , H04N19/186 , H04N19/61
Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in operation, generates a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to a first reconstructed image sample of a luma component, and generates a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component. The circuitry modifies the first coefficient value by performing an arithmetic right shift by 7 bits on the first coefficient value. The circuitry generates a third coefficient value by adding the modified first coefficient value to the second coefficient value, and encodes a third reconstructed image sample of the chroma component using the third coefficient value.
-
公开(公告)号：US12192500B2
公开(公告)日：2025-01-07
申请号：US18355164
申请日：2023-07-19
Inventor： Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Ryuichi Kanoh , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Jing Ya Li
IPC: H04N19/44 , H04N19/105 , H04N19/139 , H04N19/176 , H04N19/513
Abstract: An image encoder includes circuitry and a memory, wherein the circuitry, in operation, determines whether inter prediction is to be applied to a current block; in response to determining that the inter prediction is to be applied to the current block, performs a partition prediction process; and, in response to determining that the inter prediction is not to be applied, encodes the current block without using the partition prediction process. The partition prediction process includes predicting first values of a set of pixels between a first partition and a second partition in the current block, using a first motion vector for the first partition; predicting second values of the set of pixels, using a second motion vector for the second partition; weighting the first values and the second values; and generating a prediction image for the current block using the weighted first values and the weighted second values.
-
公开(公告)号：US12166982B2
公开(公告)日：2024-12-10
申请号：US18343393
申请日：2023-06-28
Inventor： Chong Soon Lim , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Ru Ling Liao , Takahiro Nishi , Tadamasa Toma
IPC: H04N19/119 , H04N19/176 , H04N19/50 , H04N19/60
Abstract: An encoder according to one aspect of the present disclosure encodes a block of an image, and includes a processor and memory connected to the processor. Using the memory, the processor partitions a block into a plurality of sub blocks and encodes a sub block included in the plurality of sub blocks in an encoding process including at least a transform process or a prediction process. The block is partitioned using a multiple partition including at least three odd-numbered child nodes and each of a width and a height of each of the plurality of sub blocks is a power of two.
-
Patent Agency Ranking
公开(公告)号：US12149701B2
公开(公告)日：2024-11-19
申请号：US18467531
申请日：2023-09-14
Inventor： Ru Ling Liao , Chong Soon Lim , Hai Wei Sun , Han Boon Teo , Jing Ya Li , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma
IPC: H04N19/30 , H04N19/105 , H04N19/119 , H04N19/132 , H04N19/137 , H04N19/159 , H04N19/176
Abstract: An image encoder or decoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, predicts a first set of samples for a first partition of a current picture with one or more motion vectors including a first motion vector and predicts a second set of samples for a first portion of the first partition with one or more motion vectors from a second partition different from the first partition. The samples of the first set of samples of the first portion of the first partition and of the second set of samples of the first portion of the first partition are weighted. A motion vector for the first portion of the first partition is stored which is based on one or both of the first motion vector and the second motion vector. The first partition is encoded or decoded using at least the weighted samples of the first portion of the first partition.
-
公开(公告)号：US20240380886A1
公开(公告)日：2024-11-14
申请号：US18781294
申请日：2024-07-23
Inventor： Han Boon Teo , Hai Wei Sun , Chong Soon Lim , Jing Ya Li , Chu Tong Wang , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma
IPC: H04N19/117 , H04N19/105 , H04N19/46 , H04N19/80
Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry: executes a second process of applying a second filter to the first image to generate a second image, not holding the second image as a reference image, holding the first image as a reference image, and displaying the second image; writes coefficients of each of one or more filter candidates that are candidates for the second filter into a bitstream, wherein the coefficients are included in a first storage location when written into the bitstream; and writes a parameter that specifies, for each image, one of the one or more filter candidates as the second filter into the bitstream, wherein the parameter is included in a second storage location when written into the bitstream, and the second storage location is different from the first storage location.
-
公开(公告)号：US20240357103A1
公开(公告)日：2024-10-24
申请号：US18763019
申请日：2024-07-03
Inventor： Chong Soon LIM , Hai Wei Sun , Han Boon Teo , Jing Ya Li , Che Wei Kuo , Kiyofumi Abe , Tadamasa Toma , Takahiro Nishi , Yusuke Kato
IPC: H04N19/117 , H04N19/176 , H04N19/51 , H04N19/80
CPC classification number: H04N19/117 , H04N19/176 , H04N19/51 , H04N19/80
Abstract: An encoder that encodes a current block to be encoded in an image is provided. The encoder includes: processor; and memory coupled to the processor, in which, in operation, the processor: generates a first prediction image based on a motion vector, the first prediction image being an image with full-pel precision; generates a second prediction image using an interpolation filter by interpolating a value at a fractional-pel position between full-pel positions included in the first prediction image; and encodes the current block based on the second prediction image, and in the using of the interpolation filter, the interpolation filter is switched between a first interpolation filter and a second interpolation filter differing in a total number of taps from the first interpolation filter.
-
公开(公告)号：US12114004B2
公开(公告)日：2024-10-08
申请号：US18065513
申请日：2022-12-13
Inventor： Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Ryuichi Kanoh , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Jing Ya Li
IPC: H04N19/51 , H04N19/176 , H04N19/182
CPC classification number: H04N19/51 , H04N19/176 , H04N19/182
Abstract: An encoder includes circuitry and a memory coupled to the circuitry, wherein the circuitry, in operation, performs a partition process. The partition process includes calculating first values of a set of pixels between a first partition and a second partition in a current block, using a first motion vector for the first partition; calculating second values of the set of pixels, using a second motion vector for the second partition; and calculating third values of the set of pixels by weighting the first values and the second values. When a ratio of a width to a height of the current block is larger than 4 or a ratio of the height to the width of the current block is larger than 4, the circuitry disables the partition process.
-
公开(公告)号：US20240314296A1
公开(公告)日：2024-09-19
申请号：US18675704
申请日：2024-05-28
Inventor： Jing Ya LI , Chong Soon Lim , Han Boon Teo , Hai Wei Sun , Che Wei Kuo , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Yusuke Kato
IPC: H04N19/105 , H04N19/159 , H04N19/176 , H04N19/52
CPC classification number: H04N19/105 , H04N19/159 , H04N19/176 , H04N19/52
Abstract: Provided is an encoder includes: circuitry; and memory coupled to the circuitry, in which in operation, the circuitry: generates a prediction image of a current block to be processed, using a first motion vector; and updates a history based motion vector predictor (HMVP) table using a first candidate having the first motion vector, the HMVP table storing, in a first in first out (FIFO) method, a plurality of second candidates each having a second motion vector used for a processed block, and in the updating of the HMVP table, the circuitry: determines whether a size of the current block is less than or equal to a threshold size; and skips the updating of the HMVP table when the size of the current block is determined to be less than or equal to the threshold size.
-
-
-
-
-
-
-
-
-
Search Results
172
records
(took 0.029 seconds)
