公开(公告)号：US20250047899A1

公开(公告)日：2025-02-06

申请号：US18921409

申请日：2024-10-21

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma

IPC: H04N19/52 ,  H04N19/176 ,  H04N19/186

Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: stores MV information and correction processing information into a FIFO buffer for an HMVP mode in association, the MV information being derived for a processed block and correction processing information being related to correction processing of a prediction image of the processed block; registers, in a prediction candidate list for a merge mode, one or more prediction candidates each being a combination of MV information and correction processing information, the prediction candidates including a prediction candidate which is a combination of the motion vector information and the correction processing information stored in the FIFO buffer; and selects a prediction candidate from the prediction candidate list when a current block is to be processed in the merge mode, and performs correction processing of a prediction image of the current block, based on the correction processing information.

公开(公告)号：US12219155B2

公开(公告)日：2025-02-04

申请号：US18591350

申请日：2024-02-29

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh ,  Chong Soon Lim ,  Ru Ling Liao ,  Hai Wei Sun ,  Sughosh Pavan Shashidhar ,  Han Boon Teo ,  Jing Ya Li

IPC: H04N19/159 ,  H04N19/119 ,  H04N19/139 ,  H04N19/513

Abstract: An encoder encodes a video, and includes: circuitry; and memory coupled to the circuitry. Using the memory, the circuitry: obtains at least two items of prediction information for a first partition included in the video; derives at least one template from neighboring samples which neighbor the first partition; calculates at least two costs, using the at least one template and the at least two items of prediction information; using the at least two costs, (i) determines at least one splitting direction for the first partition or (ii) assigns one of the at least two items of prediction information to a second partition split from the first partition according to the splitting direction, and another thereof to a third partition split from the first partition according to the splitting direction; and encodes the first partition according to the splitting direction and the at least two items of prediction information.

公开(公告)号：US20250037315A1

公开(公告)日：2025-01-30

申请号：US18910149

申请日：2024-10-09

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Toshiyasu SUGIO ,  Takahiro Nishi ,  Tadamasa Toma ,  Toru Matsunobu ,  Satoshi Yoshikawa ,  Tatsuya Koyama

IPC: G06T9/00 ,  G01C21/00 ,  G01S17/89 ,  G06T17/05 ,  H04L67/01 ,  H04N13/275

Abstract: A three-dimensional data creation method in a client device includes: creating three-dimensional data of a surrounding area of the client device using sensor information that is obtained through a sensor equipped in the client device and indicates a surrounding condition of the client device; estimating a self-location of the client device using the three-dimensional data created; and transmitting the sensor information obtained to a server or an other client device.

公开(公告)号：US12206906B2

公开(公告)日：2025-01-21

申请号：US18484292

申请日：2023-10-10

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon Lim ,  Hai Wei Sun ,  Han Boon Teo ,  Jing Ya Li ,  Che-Wei Kuo ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/82 ,  H04N19/119 ,  H04N19/176 ,  H04N19/593

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry determines whether to split a current luma virtual pipeline decoding unit (VPDU) into smaller blocks. When it is determined not to split the current luma VPDU into smaller blocks, the circuitry predicts a block of chroma samples without using luma samples. When it is determined to split the luma VPDU into smaller blocks, the circuitry predicts the block of chroma samples using luma samples. The circuitry encodes the block using the predicted chroma samples.

公开(公告)号：US20250024036A1

公开(公告)日：2025-01-16

申请号：US18903251

申请日：2024-10-01

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Virginie DRUGEON ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma

IPC: H04N19/119 ,  H04N19/159 ,  H04N19/176

Abstract: A decoding method is a decoding method of decoding a current block of a video from a bitstream. The decoding method includes: decoding, from the bitstream, a prediction mode indicator indicating whether bi/uni mixed prediction is to be performed for the current block; decoding, from the bitstream, two instances of motion information for the current block; and when the prediction mode indicator indicates that the bi/uni mixed prediction is to be performed for the current block, (i) for a first partition, performing first prediction using one of the two instances, the first partition being part of the current block, the first prediction being uni-prediction, and (ii) for a second partition, performing second prediction using both of the two instances, the second partition being part of the current block, the second prediction being bi-prediction.

公开(公告)号：US12200270B2

公开(公告)日：2025-01-14

申请号：US17589419

申请日：2022-01-31

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya Li ,  Chong Soon Lim ,  Han Boon Teo ,  Hai Wei Sun ,  Che-Wei Kuo ,  Chu Tong Wang ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/82 ,  H04N19/105 ,  H04N19/109 ,  H04N19/11 ,  H04N19/117 ,  H04N19/119 ,  H04N19/12 ,  H04N19/124 ,  H04N19/13 ,  H04N19/132 ,  H04N19/157 ,  H04N19/172 ,  H04N19/176 ,  H04N19/18 ,  H04N19/186 ,  H04N19/61

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in operation, generates a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to a first reconstructed image sample of a luma component, and generates a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component. The circuitry modifies the first coefficient value by performing an arithmetic right shift by 7 bits on the first coefficient value. The circuitry generates a third coefficient value by adding the modified first coefficient value to the second coefficient value, and encodes a third reconstructed image sample of the chroma component using the third coefficient value.

公开(公告)号：US12200234B2

公开(公告)日：2025-01-14

申请号：US18515944

申请日：2023-11-21

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Takahiro Nishi ,  Tadamasa Toma ,  Kiyofumi Abe ,  Ryuichi Kanoh

IPC: H04N19/31 ,  H04N19/117 ,  H04N19/172

Abstract: An encoder which encodes a video including a plurality of pictures includes circuitry and memory. Using the memory, the circuitry performs: encoding a first picture among the plurality of pictures; and performing (i) a first operation for encoding a parameter set for a second picture which follows the first picture in coding order among the plurality of pictures after encoding the first picture, and encoding the second picture after encoding the parameter set, or (ii) a second operation for encoding the second picture without encoding the parameter set after encoding the first picture. The circuitry performs the first operation when the second picture is a determined picture, in the performing of the first operation or the second operation.

公开(公告)号：US12192548B2

公开(公告)日：2025-01-07

申请号：US17669664

申请日：2022-02-11

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Noritaka Iguchi ,  Tadamasa Toma ,  Takahiro Nishi ,  Hisaya Katou

IPC: H04N21/242 ,  H04H20/18 ,  H04H60/13 ,  H04N21/43 ,  H04N21/44 ,  H04N21/462 ,  H04N21/61 ,  H04N21/8547

Abstract: According to one aspect of the present disclosure, a reception method in broadcast and broadband cooperation service, the reception method includes: receiving broadcast content transmitted through broadcast; receiving acquisition information through the broadcast, the acquisition information being information used to play back broadband content transmitted through broadband while the broadband content is synchronized with the received broadcast content, the acquisition information being information relating to acquisition of the broadband content; and acquiring the broadband content based on the received acquisition information. Therefore, the broadband content can properly be acquired in response to the reception of the broadcast content.

公开(公告)号：US12192500B2

公开(公告)日：2025-01-07

申请号：US18355164

申请日：2023-07-19

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh ,  Chong Soon Lim ,  Ru Ling Liao ,  Hai Wei Sun ,  Sughosh Pavan Shashidhar ,  Han Boon Teo ,  Jing Ya Li

IPC: H04N19/44 ,  H04N19/105 ,  H04N19/139 ,  H04N19/176 ,  H04N19/513

Abstract: An image encoder includes circuitry and a memory, wherein the circuitry, in operation, determines whether inter prediction is to be applied to a current block; in response to determining that the inter prediction is to be applied to the current block, performs a partition prediction process; and, in response to determining that the inter prediction is not to be applied, encodes the current block without using the partition prediction process. The partition prediction process includes predicting first values of a set of pixels between a first partition and a second partition in the current block, using a first motion vector for the first partition; predicting second values of the set of pixels, using a second motion vector for the second partition; weighting the first values and the second values; and generating a prediction image for the current block using the weighted first values and the weighted second values.

公开(公告)号：US20250008135A1

公开(公告)日：2025-01-02

申请号：US18883004

申请日：2024-09-12

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Virginie Drugeon ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma

IPC: H04N19/423 ,  H04N19/31 ,  H04N19/70

Abstract: An encoder includes circuitry and memory coupled to the circuitry. Given id indicating a lower temporal sublayer other than a highest temporal sublayer in temporal sublayers, the circuitry calculates a DPB output time [id] for a picture in the lower temporal sublayer. In doing so, the circuitry of the encoder subtracts a DPB output delta [id] provided for each of the temporal sublayers from a DPB output delay shared between the temporal sublayers, and given maxid indicating the highest temporal sublayer, calculates the DPB output delta [id] by subtracting a CPB removal delay [maxid] and an offset [id] from a CPB removal delay [id]. Next, the circuitry stores the offset [id] in a bitstream.