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    TRANSISTOR AMPLIFIER CIRCUIT AND INTEGRATED CIRCUIT
    2.
    发明申请
    TRANSISTOR AMPLIFIER CIRCUIT AND INTEGRATED CIRCUIT 审中-公开
    晶体管放大器电路和集成电路

    公开(公告)号：US20150145005A1

    公开(公告)日：2015-05-28

    申请号：US14542990

    申请日：2014-11-17

    Applicant: NXP B.V.

    Inventor： Viet Thanh Dinh ,  Tony Vanhoucke ,  Evelyne Gridelet ,  Anco Heringa ,  Jan Willem Slotboom ,  Dirk Klaassen

    IPC: H01L29/737 ,  H01L29/08 ,  H01L29/78 ,  H01L29/161 ,  H01L29/06

    CPC classification number: H01L29/7371 ,  H01L29/0607 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/165 ,  H01L29/735 ,  H01L29/7378 ,  H01L29/7809 ,  H01L29/7835

    Abstract: Disclosed is a transistor having a first region of a first conductivity type for injecting charge carriers into the transistor and a laterally extended second region) of the first conductivity type having a portion including a contact terminal for draining said charge carriers from the transistor, wherein the first region is separated from the second region by an intermediate region of a second conductivity type defining a first p-n junction with the first region and a second p-n junction with the second region, wherein the laterally extended region separates the portion from the second p-n junction, and wherein the transistor further comprises a substrate having a doped region of the second conductivity type, said doped region being in contact with and extending along the laterally extended second region and a further contact terminal connected to the doped region for draining minority charge carriers from the laterally extended second region. An amplifier circuit and IC including such transistors are also disclosed.

    Abstract translation: 公开了具有第一导电类型的第一区域用于将电荷载体注入晶体管的第一区域和第二导电类型的横向延伸的第二区域的晶体管，其具有包括用于从晶体管排出所述电荷载流子的接触端子的部分，其中， 第一区域与第二区域通过限定与第一区域的第一pn结的第二导电类型的中间区域和与第二区域的第二pn结分离，其中横向延伸区域将第二pn结部分与第二pn结分离， 并且其中所述晶体管还包括具有所述第二导电类型的掺杂区域的衬底，所述掺杂区域沿着所述横向延伸的第二区域接触并延伸，以及另外的接触端子，其连接到所述掺杂区域，以从所述掺杂区域中排出少数电荷载流子 横向延伸的第二区域。 还公开了包括这种晶体管的放大器电路和IC。

    Integrated circuits separated by through-wafer trench isolation
    5.
    发明授权
    Integrated circuits separated by through-wafer trench isolation 有权
    通过晶圆沟槽隔离分离的集成电路

    公开(公告)号：US09177852B2

    公开(公告)日：2015-11-03

    申请号：US14449522

    申请日：2014-08-01

    Applicant: NXP B.V.

    Inventor： Peter Gerard Steeneken ,  Roel Daamen ,  Gerard Koops ,  Jan Sonsky ,  Evelyne Gridelet ,  Coenraad Cornelis Tak

    IPC: H01L21/70 ,  H01L21/762 ,  H01L21/8238

    CPC classification number: H01L21/76232 ,  H01L21/76224 ,  H01L21/823878

    Abstract: An isolated semiconductor circuit comprising: a first sub-circuit and a second sub-circuit; a backend that includes an electrically isolating connector between the first and second sub-circuits; a lateral isolating trench between the semiconductor portions of the first and second sub-circuits, wherein the lateral isolating trench extends along the width of the semiconductor portions of the first and second sub-circuits, wherein one end of the isolating trench is adjacent the backend, and wherein the isolating trench is filled with an electrically isolating material.

    Abstract translation: 一种隔离半导体电路，包括：第一子电路和第二子电路; 后端，其包括在所述第一和第二子电路之间的电隔离连接器; 在所述第一和第二子电路的半导体部分之间的横向隔离沟槽，其中所述横向隔离沟槽沿着所述第一和第二子电路的半导体部分的宽度延伸，其中所述隔离沟槽的一端与所述后端 ，并且其中所述隔离沟槽填充有电绝缘材料。

    Method of manufacturing a bipolar transistor, bipolar transistor and integrated circuit
    7.
    发明授权
    Method of manufacturing a bipolar transistor, bipolar transistor and integrated circuit 有权
    制造双极晶体管，双极晶体管和集成电路的方法

    公开(公告)号：US09111987B2

    公开(公告)日：2015-08-18

    申请号：US14259550

    申请日：2014-04-23

    Applicant: NXP B.V.

    Inventor： Evelyne Gridelet ,  Johannes Donkers ,  Petrus Hubertus Cornelis Magnee ,  Viet Dinh ,  Tony Vanhoucke

    IPC: H01L21/331 ,  H01L27/082 ,  H01L29/70 ,  H01L29/732 ,  H01L29/40 ,  H01L29/66 ,  H01L29/737

    CPC classification number: H01L29/732 ,  H01L29/407 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/7378

    Abstract: Consistent with an example embodiment, a bipolar transistor comprises an emitter region vertically separated from a collector region in a substrate by a base region. The bipolar transistor further comprises a field plate electrically connected to the emitter region; the field plate extends from the emitter region along the base region into the collector region and the field plate is laterally electrically insulated from the base region and the collector region by a spacer. The spacer comprises an electrically isolating material that includes a silicon nitride layer and is vertically electrically isolated from the substrate by a further electrically isolating material.

    Abstract translation: 与示例实施例一致，双极晶体管包括通过基极区域与衬底中的集电极区域垂直分离的发射极区域。 双极晶体管还包括电连接到发射极区的场板; 场板沿着基极区域从发射极区域延伸到集电极区域，并且场板通过间隔物与基极区域和集电极区域横向电绝缘。 间隔物包括电绝缘材料，其包括氮化硅层，并通过另外的电绝缘材料与衬底垂直电隔离。

    Transistor amplifier circuit and integrated circuit
    8.
    发明授权
    Transistor amplifier circuit and integrated circuit 有权

    公开(公告)号：US10043894B2

    公开(公告)日：2018-08-07

    申请号：US14542990

    申请日：2014-11-17

    Applicant: NXP B.V.

    Inventor： Viet Thanh Dinh ,  Tony Vanhoucke ,  Evelyne Gridelet ,  Anco Heringa ,  Jan Willem Slotboom ,  Dirk Klaassen

    IPC: H01L29/737 ,  H01L29/06 ,  H01L29/735 ,  H01L29/78 ,  H01L29/165

    Abstract: Disclosed is a transistor having a first region of a first conductivity type for injecting charge carriers into the transistor and a laterally extended second region of the first conductivity type having a portion including a contact terminal for draining said charge carriers from the transistor, wherein the first region is separated from the second region by an intermediate region of a second conductivity type defining a first p-n junction with the first region and a second p-n junction with the second region, wherein the laterally extended region separates the portion from the second p-n junction, and wherein the transistor further comprises a substrate having a doped region of the second conductivity type, said doped region being in contact with and extending along the laterally extended second region and a further contact terminal connected to the doped region for draining minority charge carriers from the laterally extended second region. An amplifier circuit and IC including such transistors are also disclosed.

    Integrated circuits separated by through-wafer trench isolation
    10.
    发明授权
    Integrated circuits separated by through-wafer trench isolation 有权
    通过晶圆沟槽隔离分离的集成电路

    公开(公告)号：US08853816B2

    公开(公告)日：2014-10-07

    申请号：US13705627

    申请日：2012-12-05

    Applicant: NXP B.V.

    Inventor： Peter Gerard Steeneken ,  Roel Daamen ,  Gerard Koops ,  Jan Sonsky ,  Evelyne Gridelet ,  Coenraad Cornelis Tak

    IPC: H01L21/70 ,  H01L21/8238 ,  H01L21/762

    CPC classification number: H01L21/76232 ,  H01L21/76224 ,  H01L21/823878

    Abstract: An isolated semiconductor circuit comprising: a first sub-circuit and a second sub-circuit; a backend that includes an electrically isolating connector between the first and second sub-circuits; a lateral isolating trench between the semiconductor portions of the first and second sub-circuits, wherein the lateral isolating trench extends along the width of the semiconductor portions of the first and second sub-circuits, wherein one end of the isolating trench is adjacent the backend, and wherein the isolating trench is filled with an electrically isolating material.

    Abstract translation: 一种隔离半导体电路，包括：第一子电路和第二子电路; 后端，其包括在所述第一和第二子电路之间的电隔离连接器; 在所述第一和第二子电路的半导体部分之间的横向隔离沟槽，其中所述横向隔离沟槽沿着所述第一和第二子电路的半导体部分的宽度延伸，其中所述隔离沟槽的一端与所述后端 ，并且其中所述隔离沟槽填充有电绝缘材料。

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