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公开(公告)号：US11601102B2
公开(公告)日：2023-03-07
申请号：US17168618
申请日：2021-02-05
发明人： Hiroaki Tokuya , Hideyuki Sato , Fumio Harima , Kenichi Shimamoto , Satoshi Tanaka , Takayuki Kawano , Ryoki Shikishima , Atsushi Kurokawa
摘要： A power amplifier circuit includes a first transistor disposed on a semiconductor substrate; a second transistor disposed on the semiconductor substrate and configured to supply a bias current based on a first current which is a part of a control current to the first transistor; a third transistor disposed on the semiconductor substrate and having a collector configured to be supplied with a second current which is a part of the control current and an emitter configured to output a third current based on the second current; a first bump electrically connected to an emitter of the first transistor and disposed so as to overlap a first disposition area in which the first transistor is disposed in plan view of the semiconductor substrate; and a second bump disposed so as to overlap a second disposition area in which the third transistor is disposed in the plan view.
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公开(公告)号：US11469187B2
公开(公告)日：2022-10-11
申请号：US16943243
申请日：2020-07-30
发明人： Hiroaki Tokuya , Masahiro Shibata , Akihiko Ozaki , Satoshi Goto , Fumio Harima , Atsushi Kurokawa
IPC分类号： H01L29/737 , H01L27/082 , H01L23/498 , H01L23/66 , H01L23/00
摘要： At least one unit transistor is arranged over a substrate. A first wiring as a path of current that flows to each unit transistor is arranged over the at least one unit transistor. An inorganic insulation film is arranged over the first wiring. At least one first opening overlapping a partial region of the first wiring in a plan view is provided in the inorganic insulation film. An organic insulation film is arranged over the inorganic insulation film. A second wiring coupled to the first wiring through the first opening is arranged over the organic insulation film and the inorganic insulation film. In a plan view, a region in which the organic insulation film is not arranged is provided outside a region in which the first wiring is arranged. The second wiring is in contact with the inorganic insulation film outside the region in which the first wiring is arranged.
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公开(公告)号：US10903343B2
公开(公告)日：2021-01-26
申请号：US16774917
申请日：2020-01-28
发明人： Atsushi Kurokawa
IPC分类号： H01L29/737 , H01L29/08 , H01L29/417 , H01L21/768 , H01L23/522 , H01L21/3205
摘要： A semiconductor device includes an HBT; emitter wiring which is connected to an emitter electrode of the HBT and covers the HBT; a passivation film having an opening on the HBT in plan view; a UBM layer which is connected to the emitter wiring through the opening and made of a refractory metal with a thickness of 300 nm or more; and a pillar bump which is arranged on the UBM layer and includes a metal post and a solder layer. The UBM layer serves as a stress relaxation layer, thereby relaxing stress on the HBT due to a difference in thermal expansion coefficient between a GaAs-based material of each layer constituting the HBT and the pillar bump.
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公开(公告)号：US10566303B2
公开(公告)日：2020-02-18
申请号：US16209391
申请日：2018-12-04
发明人： Atsushi Kurokawa
IPC分类号： H01L29/80 , H01L23/00 , H01L29/417 , H01L29/08 , H01L29/06 , H01L27/082 , H01L29/205 , H01L29/45 , H01L27/098 , H01L29/423 , H01L29/737
摘要： A transistor includes a semiconductor region provided on a substrate and three different terminal electrodes. At least one terminal electrode has an isolated electrode structure composed of a plurality of conductor patterns. A bump, which electrically connects the plurality of conductor patterns to each other, is arranged on the terminal electrode having the isolated electrode structure. A stress-relaxing layer, which is composed of a metal material containing a high-melting-point metal, is arranged between the semiconductor region of the transistor and the bump. No current path for connecting the plurality of conductor patterns to each other is arranged between the conductor patterns and the bump.
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公开(公告)号：US10157812B2
公开(公告)日：2018-12-18
申请号：US15784667
申请日：2017-10-16
IPC分类号： H01L23/31 , H01L21/56 , H01L23/29 , H01L21/02 , H01L21/285 , H01L21/288
摘要： A semiconductor device includes a semiconductor substrate, a semiconductor element formed in or on the semiconductor substrate, a metal layer connected to the semiconductor element, and a passivation film that protects the semiconductor element. The passivation film is formed by alternately stacking a first insulation film that generates compressive stress and has low density and a second insulation film that generates compressive stress and has high density. The first insulation film is disposed in a lowest layer of the passivation film, the lowest layer being nearest to the semiconductor substrate. Each of the first insulation film and the second insulation film is one of a silicon nitride film, a silicon oxide film, and a silicon oxynitride film.
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公开(公告)号：US09331187B2
公开(公告)日：2016-05-03
申请号：US14821214
申请日：2015-08-07
IPC分类号： H01L29/732 , H01L31/072 , H01L21/331 , H01L29/737 , H01L29/08 , H01L29/15 , H01L29/20
CPC分类号： H01L29/7325 , H01L29/0821 , H01L29/152 , H01L29/20 , H01L29/7371
摘要： P-type second semiconductor layers each interposed between a corresponding pair of n-type first semiconductor layers reduce the apparent doping concentration in the entire collector layer without reducing the doping concentrations in the first semiconductor layers. This improves the linearity of capacitance characteristics and enables sufficient mass productivity to be achieved. Interposing each of the second semiconductor layers between the corresponding pair of the first semiconductor layers reduce the average carrier concentration over the entire collector layer, which allows a wide depletion layer to be formed inside the collector layer and, as a result, reduces base-collector capacitance.
摘要翻译： 各自插入相应的一对n型第一半导体层之间的P型第二半导体层降低了整个集电极层中的表观掺杂浓度，而不降低第一半导体层中的掺杂浓度。 这提高了电容特性的线性，并且能够实现足够的批量生产率。 将相应的第一半导体层之间的每一个第二半导体层插入整个集电极层上的平均载流子浓度，这允许在集电极层内形成宽的耗尽层，结果减少了基极集电极 电容。
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公开(公告)号：US11735541B2
公开(公告)日：2023-08-22
申请号：US16452637
申请日：2019-06-26
发明人： Kazuya Kobayashi , Atsushi Kurokawa , Hiroaki Tokuya , Isao Obu , Yuichi Saito
IPC分类号： H01L23/31 , H01L23/00 , H01L49/02 , H01L27/06 , H01L23/528
CPC分类号： H01L24/05 , H01L23/3171 , H01L23/3192 , H01L23/528 , H01L27/0658 , H01L27/0664 , H01L27/0676 , H01L28/20 , H01L28/40 , H01L2224/04105 , H01L2224/05558 , H01L2224/05573
摘要： A target element to be protected and a protrusion are arranged on a substrate. An insulating film arranged on the substrate covers the target element and at least a side surface of the protrusion. An electrode pad for external connection is arranged on the insulating film. The electrode pad at least partially overlaps the target element and the protrusion as seen in plan view. A maximum distance between the upper surface of the protrusion and the electrode pad in the height direction is shorter than a maximum distance between the upper surface of the target element and the electrode pad in the height direction.
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公开(公告)号：US11652016B2
公开(公告)日：2023-05-16
申请号：US17345581
申请日：2021-06-11
发明人： Mari Saji , Masahiro Shibata , Atsushi Kurokawa
IPC分类号： H01L23/36 , H01L23/48 , H01L23/00 , H01L29/737 , H01L29/205 , H01L29/06 , H01L29/417
CPC分类号： H01L23/36 , H01L23/481 , H01L24/14 , H01L29/737
摘要： A first layer conductor film is connected to an operation electrode through an opening in a first layer interlayer insulating film. An opening in a second layer interlayer insulating film is encompassed by the first layer conductor film in plan view. A second layer conductor film is connected to the first layer conductor film through the opening in a second layer interlayer insulating film. The average, along a first direction, of distances in a second direction, which is perpendicular to the first direction, from the opening in the first layer interlayer insulating film to the side surface of the opening in the second layer interlayer insulating film is greater than or equal to a distance in a height direction from an upper opening plane of the opening in the first layer interlayer insulating film to a lower opening plane of the opening in the second layer interlayer insulating film.
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公开(公告)号：US11056423B2
公开(公告)日：2021-07-06
申请号：US16411357
申请日：2019-05-14
发明人： Yuichi Sano , Atsushi Kurokawa
IPC分类号： H01L23/498 , H01L23/538 , H01L23/367 , H01L23/00 , H01L23/34
摘要： A semiconductor device includes a semiconductor chip mounted to a mounting substrate with an interposer interposed therebetween such that a surface of the semiconductor chip on which bumps are formed faces a surface of the mounting substrate. The mounting substrate has a plurality of metal parts formed as terminals on a surface of the mounting substrate and in contact with electrode pads connected to multilayer wiring. The semiconductor chip has a plurality of functional elements formed in an inner layer and a plurality of bumps formed in contact with element wiring lines of the functional elements such that the bumps protrude from the surface of the semiconductor chip. The interposer has a plurality of first recesses formed in the surface of the interposer facing the surface of the semiconductor chip on which the bumps are formed such that the first recesses accommodate only the bumps.
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公开(公告)号：US10741680B2
公开(公告)日：2020-08-11
申请号：US16710957
申请日：2019-12-11
发明人： Yasunari Umemoto , Shigeki Koya , Atsushi Kurokawa
IPC分类号： H01L21/00 , H01L29/737 , H01L29/10 , H01L29/66 , H01L29/36 , H01L29/06 , H01L29/08 , H01L29/205 , H01L21/306
摘要： A bipolar transistor has a subcollector layer and a stack of collector, base, and emitter layers on the subcollector layer. On the subcollector layer are collector electrodes. On the base layer are base electrodes. The collector layer includes multiple doped layers with graded impurity concentrations, higher on the subcollector layer side and lower on the base layer side. Of these doped layers, the one having the highest impurity concentration is in contact with the subcollector layer and has a sheet resistance less than or equal to about nine times that of the subcollector layer.
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