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    Circuit simulator, circuit simulation method and program
    1.
    发明授权
    Circuit simulator, circuit simulation method and program 失效
    电路仿真器，电路仿真方法及程序

    公开(公告)号：US08332190B2

    公开(公告)日：2012-12-11

    申请号：US12517258

    申请日：2007-12-13

    Applicant: Masahiro Tanomura ,  Naotaka Kuroda ,  Masafumi Kawanaka

    Inventor： Masahiro Tanomura ,  Naotaka Kuroda ,  Masafumi Kawanaka

    IPC: G06F17/50 ,  H01L21/82

    CPC classification number: G06F17/5036

    Abstract: Characteristics of a circuit element are predicted accurately by taking account not only of the temperature variation due to self-heating of the element but also of temperature variation due to heat transmission from an adjoining heater element. With reference to an electric network supplied from an electric network input unit (2) and a heat network supplied from a heat network input unit (3), a simulation unit (4) determines a first heat generation temperature resulting from the amount of self-heat generation of that element and a second heat generating temperature resulting from the amount of heat flowing into that element from other elements, respectively, for a plurality of elements which make up a semiconductor integrated circuit, calculates the element temperature of that element based on the first and second heat generation temperatures, and then calculates the voltage value and the current value in the element at that element temperature based on previously provided data indicative of temperature dependency of that element.

    Abstract translation: 通过考虑由于元件的自加热引起的温度变化以及由于邻接的加热器元件的热传递引起的温度变化，可以精确地预测电路元件的特性。 参考从电网输入单元（2）提供的电网和从热网输入单元（3）提供的热网络，模拟单元（4）确定由自适应量产生的第一发热温度， 对于构成半导体集成电路的多个元件，该元件的发热和由分别从其它元件流入该元件的热量产生的第二发热温度基于该元件的温度来计算元件温度 第一和第二发热温度，然后基于先前提供的指示该元件的温度依赖性的数据计算该元件温度下的元件中的电压值和电流值。

    CIRCUIT SIMULATOR, CIRCUIT SIMULATION METHOD AND PROGRAM
    2.
    发明申请
    CIRCUIT SIMULATOR, CIRCUIT SIMULATION METHOD AND PROGRAM 失效
    电路仿真器，电路仿真方法和程序

    公开(公告)号：US20100057412A1

    公开(公告)日：2010-03-04

    申请号：US12517258

    申请日：2007-12-13

    Applicant: Masahiro Tanomura ,  Naotaka Kuroda ,  Masafumi Kawanaka

    Inventor： Masahiro Tanomura ,  Naotaka Kuroda ,  Masafumi Kawanaka

    IPC: G06G7/56 ,  G06F17/50 ,  G06G7/62 ,  G06F17/10

    CPC classification number: G06F17/5036

    Abstract: Characteristics of a circuit element are predicted accurately by taking account not only of the temperature variation due to self-heating of the element but also of temperature variation due to heat transmission from an adjoining heater element. With reference to an electric network supplied from an electric network input unit (2) and a heat network supplied from a heat network input unit (3), a simulation unit (4) determines a first heat generation temperature resulting from the amount of self-heat generation of that element and a second heat generating temperature resulting from the amount of heat flowing into that element from other elements, respectively, for a plurality of elements which make up a semiconductor integrated circuit, calculates the element temperature of that element based on the first and second heat generation temperatures, and then calculates the voltage value and the current value in the element at that element temperature based on previously provided data indicative of temperature dependency of that element.

    Abstract translation: 通过考虑由于元件的自加热引起的温度变化以及由于邻接的加热器元件的热传递引起的温度变化，可以精确地预测电路元件的特性。 参考从电网输入单元（2）提供的电网和从热网输入单元（3）提供的热网络，模拟单元（4）确定由自适应量产生的第一发热温度， 对于构成半导体集成电路的多个元件，该元件的发热和由分别从其它元件流入该元件的热量产生的第二发热温度基于该元件的温度来计算元件温度 第一和第二发热温度，然后基于先前提供的指示该元件的温度依赖性的数据计算该元件温度下的元件中的电压值和电流值。

    Semiconductor Device
    6.
    发明申请
    Semiconductor Device 有权
    半导体器件

    公开(公告)号：US20080230807A1

    公开(公告)日：2008-09-25

    申请号：US11547402

    申请日：2005-03-30

    Applicant: Naotaka Kuroda ,  Masahiro Tanomura ,  Naoto Kurosawa

    Inventor： Naotaka Kuroda ,  Masahiro Tanomura ,  Naoto Kurosawa

    IPC: H01L29/73 ,  H01L23/34

    CPC classification number: H01L29/7371 ,  H01L23/367 ,  H01L27/0605 ,  H01L27/0664 ,  H01L29/66318 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor device having sufficiently high heat dissipation performance while inhibiting an increase in the area of a chip is provided. In semiconductor device 1, a plurality of HBTs 20 and a plurality of diodes 30 are one-dimensionally and alternately arranged on semiconductor substrate 10. Anode electrode 36 of diode 30 is connected to emitter electrode 27 of HBT 20 via common emitter wiring 42. Diode 30 works as heat dissipating elements dissipating to semiconductor substrate 10 the heat transmitted through common emitter wiring 42 from emitter electrode 27, and also works as a protection diode connected in parallel between an emitter and a collector of HBT 20.

    Abstract translation: 提供具有足够高的散热性能同时抑制芯片面积的增加的半导体器件。 在半导体器件1中，多个HBT 20和多个二极管30一维地交替地布置在半导体衬底10上。 二极管30的阳极电极36通过公共发射极配线42连接到HBT 20的发射极27。 二极管30作为散热元件散发到半导体衬底10上，从发射极27传播通过公共发射极配线42的热，并且还用作并联连接在HBT 20的发射极和集电极之间的保护二极管。

    Transistor with heat dissipating means
    8.
    发明授权
    Transistor with heat dissipating means 有权
    具有散热装置的晶体管

    公开(公告)号：US07741700B2

    公开(公告)日：2010-06-22

    申请号：US11547402

    申请日：2005-03-30

    Applicant: Naotaka Kuroda ,  Masahiro Tanomura ,  Naoto Kurosawa

    Inventor： Naotaka Kuroda ,  Masahiro Tanomura ,  Naoto Kurosawa

    IPC: H01L27/082 ,  H01L27/102 ,  H01L29/70 ,  H01L31/11

    CPC classification number: H01L29/7371 ,  H01L23/367 ,  H01L27/0605 ,  H01L27/0664 ,  H01L29/66318 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor device having sufficiently high heat dissipation performance while inhibiting an increase in the area of a chip is provided. In semiconductor device 1, a plurality of HBTs 20 and a plurality of diodes 30 are one-dimensionally and alternately arranged on semiconductor substrate 10. Anode electrode 36 of diode 30 is connected to emitter electrode 27 of HBT 20 via common emitter wiring 42. Diode 30 works as heat dissipating elements dissipating to semiconductor substrate 10 the heat transmitted through common emitter wiring 42 from emitter electrode 27, and also works as a protection diode connected in parallel between an emitter and a collector of HBT 20.

    Abstract translation: 提供具有足够高的散热性能同时抑制芯片面积的增加的半导体器件。 在半导体器件1中，多个HBT 20和多个二极管30在半导体衬底10上一维地交替地布置。二极管30的阳极电极36通过公共发射极布线42连接到HBT 20的发射电极27.二极管 30作为散热元件散发到半导体衬底10上，从发射极27传播通过公共发射极配线42的热，并且还用作并联连接在HBT 20的发射极和集电极之间的保护二极管。

    Process for producing gallium nitride crystal substrate, and gallium nitride crystal substrate
    9.
    发明授权
    Process for producing gallium nitride crystal substrate, and gallium nitride crystal substrate 有权
    制造氮化镓晶体基板的方法和氮化镓晶体基板

    公开(公告)号：US06824610B2

    公开(公告)日：2004-11-30

    申请号：US10106693

    申请日：2002-03-26

    Applicant: Masatomo Shibata ,  Naotaka Kuroda

    Inventor： Masatomo Shibata ,  Naotaka Kuroda

    IPC: C30B2504

    CPC classification number: H01L21/02491 ,  C30B25/02 ,  C30B25/18 ,  C30B29/40 ,  C30B29/406 ,  H01L21/02381 ,  H01L21/02389 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/02636 ,  Y10S117/915

    Abstract: A metal film is deposited on a starting substrate, which is any one of a single crystal sapphire substrate, a substrate comprising a single crystal gallium nitride film grown on a sapphire substrate, and a single crystal semiconductor substrate, and a gallium nitride film is deposited on the metal film to form a laminate substrate. By virtue of the above construction, after the growth of the gallium nitride film, the gallium nitride film can be easily separated from the starting substrate, and a gallium nitride crystal substrate, which has low defect density and has not been significantly contaminated with impurities, can be produced in a simple manner.

    Abstract translation: 金属膜沉积在起始衬底上，该起始衬底是单晶蓝宝石衬底，包括在蓝宝石衬底上生长的单晶氮化镓膜的衬底和单晶半导体衬底中的任何一个，并且沉积氮化镓膜 在金属膜上形成层叠基板。 通过上述结构，在氮化镓膜生长之后，氮化镓膜可以容易地与起始衬底分离，并且具有低缺陷密度且未被杂质显着污染的氮化镓晶体衬底， 可以简单地生产。

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