公开(公告)号：US12063782B2

公开(公告)日：2024-08-13

申请号：US17941900

申请日：2022-09-09

申请人： Lodestar Licensing Group LLC

发明人： John D. Hopkins ,  Justin D. Shepherdson ,  Collin Howder ,  Jordan D. Greenlee

IPC分类号： H10B43/27 ,  H01L21/02 ,  H01L21/28 ,  H01L21/285 ,  H01L21/311 ,  H01L29/66 ,  H10B41/10 ,  H10B41/27 ,  H10B43/10

CPC分类号： H10B43/27 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02532 ,  H01L21/28518 ,  H01L21/31111 ,  H01L29/40114 ,  H01L29/40117 ,  H01L29/66545 ,  H10B41/10 ,  H10B41/27 ,  H10B43/10

摘要： Some embodiments include methods of forming integrated assemblies. A conductive structure is formed to include a semiconductor-containing material over a metal-containing material. An opening is formed to extend into the conductive structure. A conductive material is formed along a bottom of the opening. A stack of alternating first and second materials is formed over the conductive structure either before or after forming the conductive material. Insulative material and/or channel material is formed to extend through the stack to contact the conductive material. Some embodiments include integrated assemblies.

公开(公告)号：US20230413563A1

公开(公告)日：2023-12-21

申请号：US18460462

申请日：2023-09-01

申请人： Lodestar Licensing Group, LLC

发明人： Yifen Liu ,  Tecla Ghilardi ,  George Matamis ,  Justin D. Shepherdson ,  Nancy M. Lomeli ,  Chet E. Carter ,  Erik R. Byers

IPC分类号： H10B43/27 ,  H01L21/768 ,  H01L23/528 ,  H01L23/532 ,  H01L23/522 ,  H10B41/27 ,  H10B41/35 ,  H10B43/35

CPC分类号： H10B43/27 ,  H01L21/76877 ,  H01L23/5283 ,  H01L23/53257 ,  H01L23/53271 ,  H01L21/76816 ,  H01L23/5226 ,  H10B41/27 ,  H10B41/35 ,  H10B43/35

摘要： A microelectronic device comprises a first set of tiers, each tier of the first set of tiers comprising alternating levels of a conductive material and an insulative material and having a first tier pitch, a second set of tiers adjacent to the first set of tiers, each tier of the second set of tiers comprising alternating levels of the conductive material and the insulative material and having a second tier pitch less than the first tier pitch, a third set of tiers adjacent to the second set of tiers, each tier of the third set of tiers comprising alternating levels of the conductive material and the insulative material and having a third tier pitch less than the second tier pitch, and a string of memory cells extending through the first set of tiers, the second set of tiers, and the third set of tiers. Related microelectronic devices, electronic systems, and methods are also described.