公开(公告)号：US11977940B2

公开(公告)日：2024-05-07

申请号：US17369449

申请日：2021-07-07

Applicant: Kioxia Corporation

Inventor： Akihisa Fujimoto ,  Toshitada Saito ,  Noriya Sakamoto ,  Atsushi Kondo

IPC: G11C5/02 ,  G06K19/077 ,  G11C5/06 ,  G11C11/4074 ,  G11C16/02 ,  G11C16/30

CPC classification number: G06K19/07732 ,  G06K19/07733 ,  G06K19/07743 ,  G11C5/06 ,  G11C11/4074 ,  G11C16/02 ,  G11C16/30

Abstract: According to one embodiment, there is provided a memory card including a first surface, a second surface, and 1st to Nth terminal groups. The first surface includes first to Nth rows, where N is an integer of two or greater. The second surface faces the opposite side from the first surface. The 1st to Nth terminal groups are placed in the first to Nth rows. The 1st terminal group includes terminals to which differential clock signals are assigned, terminals to which single-ended signals are assigned, and a terminal to which a first power supply voltage is assigned. Kth terminal group, where K is an integer no smaller than two and no greater than N, includes terminals to which differential data signals are assigned.

公开(公告)号：US11093811B2

公开(公告)日：2021-08-17

申请号：US16619012

申请日：2018-03-09

Applicant: Kioxia Corporation

Inventor： Akihisa Fujimoto ,  Toshitada Saito ,  Noriya Sakamoto ,  Atsushi Kondo

IPC: G06F13/00 ,  G06K19/077

Abstract: A memory card includes a first surface, a second surface, and 1st to Nth terminal groups. The first surface includes first to Nth rows, wherein N is an integer of two or greater. The second surface faces the opposite side from the first surface. The 1st to Nth terminal groups are placed in the first to Nth rows. The 1st terminal group includes terminals to which differential clock signals are assigned, terminals to which single-ended signals are assigned, and a terminal to which a first power supply voltage is assigned. Kth terminal group, wherein K is an integer no smaller than two and no greater than N, includes terminals to which differential data signals are assigned.

公开(公告)号：US12048110B2

公开(公告)日：2024-07-23

申请号：US17076109

申请日：2020-10-21

Applicant: Kioxia Corporation

Inventor： Akihisa Fujimoto ,  Atsushi Kondo ,  Noriya Sakamoto ,  Taku Nishiyama ,  Katsuyoshi Watanabe

IPC: G06F3/00 ,  G06F1/18 ,  G06F13/40 ,  G06F13/42 ,  G11C5/04 ,  H05K5/02

CPC classification number: H05K5/0247 ,  G06F1/187 ,  G06F13/4068 ,  G06F13/4221 ,  G11C5/04 ,  G06F2213/0026

Abstract: According to one embodiment, a semiconductor memory device includes a housing and terminals. The housing has a first end edge extending in a first direction and a second end edge opposite to the first end edge. The terminals include signal terminals and include first terminals, second terminals, and third terminals. The first terminals are arranged in the first direction at a position close to the first end edge. The second terminals are arranged in the first direction with intervals at a position closer to the first end edge than the second end edge. The first plurality of terminals are closer to the first end edge than the second plurality of terminals are. The third terminals are arranged in the first direction with intervals at a position closer to the second end edge than the first end edge.