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    HYBRIDIZATION LINKERS
    3.
    发明申请
    HYBRIDIZATION LINKERS 有权
    混合连接

    公开(公告)号：US20120064599A1

    公开(公告)日：2012-03-15

    申请号：US13147176

    申请日：2010-01-29

    申请人： Lakmal Jayasinghe ,  John Milton ,  Luke McNeill ,  James Clarke ,  James White ,  Ruth Moysey

    发明人： Lakmal Jayasinghe ,  John Milton ,  Luke McNeill ,  James Clarke ,  James White ,  Ruth Moysey

    IPC分类号： C07H21/00 ,  C09K3/00 ,  C12N9/96 ,  C07H1/00 ,  C07K14/00 ,  C07K1/107

    CPC分类号： C12N9/22 ,  C07K14/31 ,  C07K2319/03 ,  C12N9/1241 ,  C12N9/90

    摘要： The invention provides method of covalently coupling two or more moieties, the method comprising: (a) providing a first moiety having covalently attached thereto (i) at least one first linker comprising a first hybridizable region and (ii) at least one first group capable of forming a covalent bond; (b) providing a second moiety having covalently attached thereto (i) at least one second linker comprising a second hybridizable region capable of hybridizing to the first hybridizable region and (ii) at least a second group capable of forming a covalent bond with the first group; (c) contacting the first and second moieties under conditions that allow the first and second hybridizable regions to hybridize and link the moieties; and (d) exposing the linked moieties to conditions that allow the formation of a covalent bond between the first and second groups.

    摘要翻译： 本发明提供了共价偶联两个或更多个部分的方法，所述方法包括：（a）提供共价连接到其上的第一部分（i）至少一个包含第一可杂交区域的第一接头和（ii）至少一个能够 形成共价键; （b）提供共价连接到其上的第二部分（i）至少一个第二接头，其包含能够与第一可杂交区域杂交的第二可杂交区域和（ii）至少第二个能够与第一可共< 组; （c）在允许第一和第二可杂交区域杂交并连接部分的条件下使第一和第二部分接触; 和（d）将连接的部分暴露于允许在第一和第二基团之间形成共价键的条件。

    SEMICONDUCTOR INTERCONNECT STRUCTURES
    8.
    发明申请
    SEMICONDUCTOR INTERCONNECT STRUCTURES 有权

    公开(公告)号：US20140151893A1

    公开(公告)日：2014-06-05

    申请号：US13693598

    申请日：2012-12-04

    申请人： Boyan Boyanov ,  Kanwal Singh ,  James Clarke ,  Alan Myers

    发明人： Boyan Boyanov ,  Kanwal Singh ,  James Clarke ,  Alan Myers

    IPC分类号： H01L23/522 ,  H01L21/768

    CPC分类号： H01L23/5283 ,  H01L21/76802 ,  H01L21/76816 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76835 ,  H01L21/76877 ,  H01L21/76883 ,  H01L21/76885 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53228 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Techniques are disclosed that enable improved shorting margin between unlanded conductive interconnect features and neighboring conductive features. In some embodiments, an etch may be applied to an insulator layer having one or more conductive features therein, such that the insulator layer is recessed below the top of the conductive features and the edges of the conductive features are rounded or otherwise softened. A conformal etch stop layer may then be deposited over the conductive features and the insulator material. A second insulator layer may be deposited above the conformal etch stop layer, and an interconnect feature may pass through the second insulator layer and the conformal etch stop layer to connect with the rounded portion of one of the conductive features. In some embodiments, the interconnect feature is an unlanded via and the unlanded portion of the via may or may not penetrate through the conformal barrier layer.

    摘要翻译： 公开了能够改善未上行的导电互连特征与相邻导电特征之间的短路裕度的技术。 在一些实施例中，可以将蚀刻施加到其中具有一个或多个导电特征的绝缘体层，使得绝缘体层凹入导电特征的顶部下方，并且导电特征的边缘被倒圆或以其它方式软化。 然后可以在导电特征和绝缘体材料上沉积保形蚀刻停止层。 可以在保形蚀刻停止层上方沉积第二绝缘体层，并且互连特征可以穿过第二绝缘体层和保形蚀刻停止层以与导电特征之一的圆形部分连接。 在一些实施例中，互连特征是未上通孔，并且通孔的未上覆部分可以穿透或不穿透保形阻挡层。

    Wafer inspection with a customized reflective optical channel component
    9.
    发明申请
    Wafer inspection with a customized reflective optical channel component 有权
    使用定制的反射光通道部件进行晶片检查

    公开(公告)号：US20060119841A1

    公开(公告)日：2006-06-08

    申请号：US11332195

    申请日：2006-01-12

    申请人： Winston Saunders ,  James Clarke

    发明人： Winston Saunders ,  James Clarke

    IPC分类号： G01N21/88

    CPC分类号： G01N21/9501 ,  G01N21/956

    摘要： A method is described that adjusts the position of a item and sets a tilt angle for each of a plurality of micro-mirrors of a digital micro-mirror device. The setting of the tilt angles is to establish a filter within the optical channel of an inspection tool that inspects the item. The filter is to reduce noise received at an optical detection device. The tilt angle settings are a function of the position. The method also includes comparing information from the optical detection device that describes an inspected region of the item's surface against an expected version of the information.

    摘要翻译： 描述了一种调节物品的位置并为数字微镜装置的多个微反射镜中的每一个设置倾斜角的方法。 倾斜角的设置是在检查项目的检查工具的光通道内建立一个过滤器。 该滤波器用于减少在光学检测装置处接收到的噪声。 倾斜角度设置是位置的函数。 该方法还包括将来自光学检测装置的信息与描述物品表面的被检查区域与信息的预期版本进行比较。

    Processing electronic devices using a combination of supercritical fluid and sonic energy
    10.
    发明申请
    Processing electronic devices using a combination of supercritical fluid and sonic energy 审中-公开
    使用超临界流体和声能的组合处理电子设备

    公开(公告)号：US20060065627A1

    公开(公告)日：2006-03-30

    申请号：US10954384

    申请日：2004-09-29

    申请人： James Clarke ,  Kenneth Cadien ,  Justin Brask

    发明人： James Clarke ,  Kenneth Cadien ,  Justin Brask

    IPC分类号： B44C1/22 ,  B08B6/00 ,  C23F1/00

    CPC分类号： H01L29/66545 ,  B08B3/12 ,  B08B7/0021 ,  C23F1/02 ,  C23F1/10 ,  C23F1/12 ,  H01L21/28079 ,  H01L21/32133 ,  H01L29/665

    摘要： A method of processing a substrate. The method comprises flowing a supercritical fluid and a co-solvent across a substrate placed in a pressure tight vessel and applying a sonic energy to a surface of the substrate. The sonic energy can be an ultrasonic energy or a megasonic energy. The use of supercritical fluid and sonic energy can be used to clean a substrate, condition a surface of a substrate, to etch a substrate, to etch metal, to deliver materials to trenches and cavaties, and to selectively remove a polysilicon layer.

    摘要翻译： 一种处理衬底的方法。 该方法包括使超临界流体和辅助溶剂流过放置在压力容器中的基底上并将声能施加到基底表面。 声能可以是超声能量或兆声波能量。 超临界流体和声能的使用可用于清洁基底，调节基底的表面，蚀刻基底，蚀刻金属，将材料输送到沟槽和气泡，以及选择性地去除多晶硅层。