公开(公告)号：US10374056B2

公开(公告)日：2019-08-06

申请号：US15337829

申请日：2016-10-28

Applicant: Infineon Technologies Austria AG

Inventor： Katarzyna Kowalik-Seidl ,  Bjoern Fischer ,  Winfried Kaindl ,  Markus Schmitt ,  Matthias Wegscheider

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/265 ,  H01L29/06 ,  H01L29/739 ,  H01L29/08 ,  H01L29/10 ,  H01L21/225

Abstract: Disclosed is a method for producing a transistor device and a transistor device. The method includes: forming a source region of a first doping type in a body region of a second doping type in a semiconductor body; and forming a low-resistance region of the second doping type adjoining the source region in the body region. Forming the source region includes implanting dopant particles of the first doping type using an implantation mask via a first surface of the semiconductor body into the body region. Implanting the doping particles of the first doping type includes a tilted implantation.

公开(公告)号：US20170125580A1

公开(公告)日：2017-05-04

申请号：US15337829

申请日：2016-10-28

Applicant: Infineon Technologies Austria AG

Inventor： Katarzyna Kowalik-Seidl ,  Bjoern Fischer ,  Winfried Kaindl ,  Markus Schmitt ,  Matthias Wegscheider

IPC: H01L29/78 ,  H01L29/10 ,  H01L21/265 ,  H01L29/739 ,  H01L21/266 ,  H01L29/06 ,  H01L29/66 ,  H01L29/08 ,  H01L21/324

CPC classification number: H01L29/66333 ,  H01L21/2253 ,  H01L21/26586 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/0865 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/6634 ,  H01L29/66719 ,  H01L29/66727 ,  H01L29/7396 ,  H01L29/7802

Abstract: Disclosed is a method for producing a transistor device and a transistor device. The method includes: forming a source region of a first doping type in a body region of a second doping type in a semiconductor body; and forming a low-resistance region of the second doping type adjoining the source region in the body region. Forming the source region includes implanting dopant particles of the first doping type using an implantation mask via a first surface of the semiconductor body into the body region. Implanting the doping particles of the first doping type includes a tilted implantation.

公开(公告)号：US10943987B2

公开(公告)日：2021-03-09

申请号：US16452070

申请日：2019-06-25

Applicant: Infineon Technologies Austria AG

Inventor： Katarzyna Kowalik-Seidl ,  Bjoern Fischer ,  Winfried Kaindl ,  Markus Schmitt ,  Matthias Wegscheider

IPC: H01L21/265 ,  H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L29/739 ,  H01L29/417 ,  H01L29/08 ,  H01L29/10 ,  H01L21/225

Abstract: A transistor device includes at least one transistor cell, having, in a semiconductor body, a source region of a first doping type in a body region of a second doping type, a drain region, and a drift region of the first doping type adjoining the body region and arranged between the body region and the drain region. A low-resistance region of the second doping type in the body region adjoins the source region. A gate electrode dielectrically insulated from the source and body regions by a gate dielectric is arranged above a first surface of the semiconductor body. A length of an overlap between the source region and the gate electrode is larger than 70 nanometers. A doping profile of the low-resistance region along a line that is vertical to the first surface and goes through an edge of the gate electrode has a maximum of higher than 1E19 cm−3.

公开(公告)号：US20190319110A1

公开(公告)日：2019-10-17

申请号：US16452070

申请日：2019-06-25

Applicant: Infineon Technologies Austria AG

Inventor： Katarzyna Kowalik-Seidl ,  Bjoern Fischer ,  Winfried Kaindl ,  Markus Schmitt ,  Matthias Wegscheider

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/739 ,  H01L29/417 ,  H01L29/06 ,  H01L21/265

Abstract: A transistor device includes at least one transistor cell, having, in a semiconductor body, a source region of a first doping type in a body region of a second doping type, a drain region, and a drift region of the first doping type adjoining the body region and arranged between the body region and the drain region. A low-resistance region of the second doping type in the body region adjoins the source region. A gate electrode dielectrically insulated from the source and body regions by a gate dielectric is arranged above a first surface of the semiconductor body. A length of an overlap between the source region and the gate electrode is larger than 70 nanometers. A doping profile of the low-resistance region along a line that is vertical to the first surface and goes through an edge of the gate electrode has a maximum of higher than 1E19 cm−3.