公开(公告)号：US20230051100A1

公开(公告)日：2023-02-16

申请号：US17980004

申请日：2022-11-03

Applicant: Infineon Technologies AG

Inventor： Bun Kian Tay ,  Mei Yih Goh ,  Martin Gruber ,  Josef Hoeglauer ,  Michael Juerss ,  Josef Maerz ,  Thorsten Meyer ,  Thorsten Scharf ,  Chee Voon Tan

IPC: H01L23/498 ,  H01L23/31 ,  H01L21/56 ,  H01L23/495 ,  H01L21/48

Abstract: A molded semiconductor package includes a lead frame having one or more first leads monolithically formed with a die pad and extending outward from the pad in a first direction. A semiconductor die is attached to the die pad at a first side of the die. A metal clip of a clip frame is attached to a power terminal at a second side of the die. One or more second leads monolithically formed with the metal clip extend outward from the clip in a second direction different than the first direction. A mold compound embeds the die. The first lead(s) and the second lead(s) are exposed at different sides of the mold compound and do not vertically overlap with one another. Within the mold compound, the clip transitions from a first level above the power terminal to a second level in a same plane as the leads.

公开(公告)号：US20210035876A1

公开(公告)日：2021-02-04

申请号：US16939303

申请日：2020-07-27

Applicant: Infineon Technologies AG

Inventor： Ralf Otremba ,  Markus Dinkel ,  Josef Hoeglauer ,  Angela Kessler

IPC: H01L23/31 ,  H01L23/495 ,  H01L25/065

Abstract: A semiconductor package is disclosed. In one example, the semiconductor package includes a package body and a semiconductor component encapsulated in the package body. A cavity is formed in a bottom surface of the package body.

公开(公告)号：US09362193B2

公开(公告)日：2016-06-07

申请号：US13742456

申请日：2013-01-16

Applicant: Infineon Technologies AG

Inventor： Ralf Otremba ,  Josef Hoeglauer ,  Juergen Schredl ,  Xaver Schloegel ,  Wolfram Hable ,  Manfred Mengel ,  Joachim Mahler ,  Khalil Hosseini

IPC: H01L23/373 ,  H01L23/29 ,  H01L21/56 ,  H01L23/31 ,  H01L23/06 ,  H01L23/495 ,  H01L23/00

Abstract: A chip arrangement is provided, the chip arrangement, including a carrier; at least one chip electrically connected to a carrier top side; an encapsulation material at least partially surrounding the at least one chip and the carrier top side, wherein the encapsulation material is formed on one or more lateral sides of the carrier; and a ceramic material disposed on a carrier bottom side, and on at least one side of the encapsulation material.

公开(公告)号：US09230880B2

公开(公告)日：2016-01-05

申请号：US14165754

申请日：2014-01-28

Applicant: Infineon Technologies AG

Inventor： Ralf Otremba ,  Josef Hoeglauer ,  Juergen Schredl ,  Teck Sim Lee ,  Xaver Schloegel ,  Klaus Schiess

IPC: H01L23/495 ,  H01L23/40 ,  H01L21/3105 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L23/367 ,  H01L23/433

CPC classification number: H01L23/4006 ,  H01L21/31053 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/367 ,  H01L23/4093 ,  H01L23/4334 ,  H01L23/49548 ,  H01L23/49562 ,  H01L23/49568 ,  H01L24/37 ,  H01L24/40 ,  H01L24/83 ,  H01L2023/4031 ,  H01L2023/405 ,  H01L2023/4087 ,  H01L2224/37147 ,  H01L2224/3754 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

Abstract: An electronic device includes a semiconductor chip including an electrode, a substrate element and a contact element connecting the electrode to the substrate element. The electronic device further includes an encapsulant configured to leave the contact element at least partially exposed such that a heatsink may be connected to the contact element.

Abstract translation: 电子设备包括半导体芯片，其包括电极，基板元件和将电极连接到基板元件的接触元件。 电子设备还包括密封剂，其被配置为使接触元件至少部分地暴露，使得散热器可以连接到接触元件。

公开(公告)号：US09117786B2

公开(公告)日：2015-08-25

申请号：US13693205

申请日：2012-12-04

Applicant: Infineon Technologies AG

Inventor： Ralf Otremba ,  Josef Hoeglauer ,  Juergen Schredl ,  Xaver Schloegel ,  Klaus Schiess

IPC: H01L23/12 ,  H01L23/34 ,  H01L21/56 ,  H01L23/36 ,  H01L23/373 ,  H01L23/498 ,  H01L23/538

CPC classification number: H01L23/34 ,  H01L21/56 ,  H01L23/36 ,  H01L23/3735 ,  H01L23/49827 ,  H01L23/5389 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The chip module includes a carrier, a semiconductor chip arranged on or embedded inside the carrier, and an insulation layer that at least partly covers a face of the carrier. The dielectric constant ∈r and the thermal conductivity λ of the insulation layer satisfy the condition λ·∈r

Abstract translation: 芯片模块包括载体，布置在载体上或嵌入载体内部的半导体芯片，以及至少部分覆盖载体的表面的绝缘层。 绝缘层的介电常数εr和热导率λ满足条件λ·∈r<4.0 W·m-1·K-1。

公开(公告)号：US09018744B2

公开(公告)日：2015-04-28

申请号：US13626830

申请日：2012-09-25

Applicant: Infineon Technologies AG

Inventor： Ralf Otremba ,  Josef Hoeglauer ,  Khalil Hosseini

IPC: H01L23/495 ,  H01L23/34 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L21/56 ,  H01L23/498 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L21/56 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/498 ,  H01L24/34 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L2224/32245 ,  H01L2224/371 ,  H01L2224/37139 ,  H01L2224/37144 ,  H01L2224/37147 ,  H01L2224/37164 ,  H01L2224/37169 ,  H01L2224/37599 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40249 ,  H01L2224/4103 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device comprises a carrier. Further, the semiconductor devices comprises a semiconductor chip comprising a first main surface and a second main surface opposite to the first main surface, wherein a first electrode is arranged on the first main surface and the semiconductor chip is mounted on the carrier with the second main surface facing the carrier. Further, an encapsulation body embedding the semiconductor chip is provided. The semiconductor device further comprises a contact clip, wherein the contact clip is an integral part having a bond portion bonded to the first electrode and having a terminal portion forming an external terminal of the semiconductor device.

Abstract translation: 半导体器件包括载体。 此外，半导体器件包括半导体芯片，其包括第一主表面和与第一主表面相对的第二主表面，其中第一电极布置在第一主表面上，并且半导体芯片安装在载体上，第二主体 面向载体的表面。 此外，提供了嵌入半导体芯片的封装体。 半导体器件还包括接触夹，其中接触夹是具有接合到第一电极并具有形成半导体器件的外部端子的端子部分的接合部分的整体部分。

公开(公告)号：US20140084433A1

公开(公告)日：2014-03-27

申请号：US13626830

申请日：2012-09-25

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Ralf Otremba ,  Josef Hoeglauer ,  Khalil Hosseini

IPC: H01L21/56 ,  H01L23/498

CPC classification number: H01L21/56 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/498 ,  H01L24/34 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L2224/32245 ,  H01L2224/371 ,  H01L2224/37139 ,  H01L2224/37144 ,  H01L2224/37147 ,  H01L2224/37164 ,  H01L2224/37169 ,  H01L2224/37599 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40249 ,  H01L2224/4103 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device comprises a carrier. Further, the semiconductor devices comprises a semiconductor chip comprising a first main surface and a second main surface opposite to the first main surface, wherein a first electrode is arranged on the first main surface and the semiconductor chip is mounted on the carrier with the second main surface facing the carrier. Further, an encapsulation body embedding the semiconductor chip is provided. The semiconductor device further comprises a contact clip, wherein the contact clip is an integral part having a bond portion bonded to the first electrode and having a terminal portion forming an external terminal of the semiconductor device.

Abstract translation: 半导体器件包括载体。 此外，半导体器件包括半导体芯片，其包括第一主表面和与第一主表面相对的第二主表面，其中第一电极布置在第一主表面上，并且半导体芯片安装在载体上，第二主体 面向载体的表面。 此外，提供了嵌入半导体芯片的封装体。 半导体器件还包括接触夹，其中接触夹是具有接合到第一电极并具有形成半导体器件的外部端子的端子部分的接合部分的整体部分。

公开(公告)号：US12237246B2

公开(公告)日：2025-02-25

申请号：US17196652

申请日：2021-03-09

Applicant: Infineon Technologies AG

Inventor： Petteri Palm ,  Robert Fehler ,  Josef Hoeglauer ,  Angela Kessler

IPC: H01L23/485 ,  H01L23/00 ,  H01L23/31

Abstract: A semiconductor device is disclosed. In one example, the semiconductor device includes a semiconductor chip including a first chip contact pad on a first chip main surface. The semiconductor device further includes a first electrically conductive layer arranged over the first chip main surface and electrically coupled to the first chip contact pad, wherein the first electrically conductive layer extends in a direction parallel to the first chip main surface. An electrical through connection is electrically coupled to the first electrically conductive layer and to a second electrically conductive layer, wherein the electrical through connection extends in a direction perpendicular to the first chip main surface, and wherein, in a top view of the first chip main surface, the electrical through connection and the semiconductor chip are non-overlapping.

公开(公告)号：US20210166998A1

公开(公告)日：2021-06-03

申请号：US17176576

申请日：2021-02-16

Applicant: Infineon Technologies AG

Inventor： Thorsten Scharf ,  Martin Gruber ,  Josef Hoeglauer ,  Michael Juerss ,  Josef Maerz ,  Thorsten Meyer ,  Bun Kian Tay

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/56

Abstract: A molded semiconductor package includes a lead frame having one or more first leads monolithically formed with a die pad and extending outward from the pad in a first direction. A semiconductor die is attached to the die pad at a first side of the die. A metal clip of a clip frame is attached to a power terminal at a second side of the die. One or more second leads monolithically formed with the metal clip extend outward from the clip in a second direction different than the first direction. A mold compound embeds the die. The first lead(s) and the second lead(s) are exposed at different sides of the mold compound and do not vertically overlap with one another. Within the mold compound, the clip transitions from a first level above the power terminal to a second level in a same plane as the leads.

公开(公告)号：US09412626B2

公开(公告)日：2016-08-09

申请号：US14935510

申请日：2015-11-09

Applicant: Infineon Technologies AG

Inventor： Ralf Otremba ,  Josef Hoeglauer ,  Juergen Schredl ,  Xaver Schloegel ,  Klaus Schiess ,  Bernd Roemer ,  Edward Fuergut

IPC: H01L21/00 ,  H01L21/56 ,  H01L23/34 ,  H01L23/495 ,  H01L23/31 ,  H01L23/00 ,  H01L23/552

CPC classification number: H01L21/565 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/34 ,  H01L23/495 ,  H01L23/49562 ,  H01L23/49568 ,  H01L23/552 ,  H01L24/05 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/0603 ,  H01L2224/06181 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/29099

Abstract: A method for manufacturing a chip arrangement, including disposing a chip over a carrier, wherein the bottom side of the chip is electrically connected to the first carrier side via one or more contact pads on the chip bottom side, disposing a first encapsulation material over the first carrier side, wherein the first encapsulation material at least partially surrounds the chip, and disposing a second encapsulation material over a second carrier side, wherein the second encapsulation material is in direct contact with the second carrier side.

Abstract translation: 一种用于制造芯片布置的方法，包括在载体上布置芯片，其中芯片的底侧通过芯片底侧上的一个或多个接触焊盘电连接到第一载体侧，在第一封装材料上设置第一封装材料 第一载体侧，其中第一封装材料至少部分地围绕芯片，并且在第二载体侧上设置第二封装材料，其中第二封装材料与第二载体侧直接接触。