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公开(公告)号：US20130170372A1
公开(公告)日：2013-07-04
申请号：US13715349
申请日：2012-12-14
Applicant: Huawei Technologies Co., Ltd.
Inventor： Jinfang Zhang , Haihua Shen , Gang Huang , Wenliang Liang , Bojie Li
IPC: H04W24/02
CPC classification number: H04W24/02 , H04L1/1812 , H04L1/1854
Abstract: A method for obtaining feedback delay includes: obtaining a target time elapsed in a process from when a remote radio end receives uplink data sent from a user end to when the remote radio end sends out feedback information responsive to the uplink data to the user end, wherein the feedback information responsive to the uplink data is fed back by a processing node to the remote radio end; calculating a feedback delay by adding the target time and an air interface transmission propagation delay, wherein the air interface transmission propagation delay is a transmission time of the uplink data from the user end to the remote radio end; and configuring, by the processing node, an uplink hybrid automatic repeat request (HARQ) ACK/NACK feedback interval to be the feedback delay.
Abstract translation: 用于获得反馈延迟的方法包括：获得从远程无线电终端接收到从用户端发送的上行链路数据到远程无线电端响应于上行链路数据向用户端发送反馈信息的过程中经过的目标时间， 其中响应于上行链路数据的反馈信息由处理节点反馈给远程无线电端; 通过增加目标时间和空中接口传输传播延迟来计算反馈延迟，其中空中接口传输传播延迟是从用户端到远程无线电端的上行链路数据的传输时间; 以及由处理节点将上行链路混合自动重传请求（HARQ）ACK / NACK反馈间隔配置为反馈延迟。
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公开(公告)号：US10966245B2
公开(公告)日：2021-03-30
申请号：US16452509
申请日：2019-06-25
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Haihua Shen , Wenliang Liang
Abstract: Embodiments of this application provide a channel configuration method. The method includes: determining, by a base station, a quantity of system flows based on a random access channel detection result; configuring, by the base station, an uplink channel and a downlink channel based on the quantity of system flows, where the uplink channel is a radio frequency channel used for uplink transmission, and the downlink channel is a radio frequency channel used for downlink transmission; and transmitting, by the base station, data based on the configured uplink channel and the configured downlink channel. Therefore, while system transmission performance is ensured, a communication requirement can be flexibly met, and system processing resources and transmission resources can be saved.
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公开(公告)号：US10186010B2
公开(公告)日：2019-01-22
申请号：US15493687
申请日：2017-04-21
Applicant: Huawei Technologies Co., Ltd.
Inventor： Wenliang Liang , Liang Zhuang
Abstract: Embodiments of the present invention disclose an electronic device and a graphics processing unit card, which can improve data input and output capabilities. The electronic device includes a graphics processing unit card and a mainboard. The graphics processing unit card includes a main chip and M first PCIe interfaces electrically connected to the main chip, where M is an integer greater than or equal to 2. The mainboard includes a processing unit and M second PCIe interfaces connected to the processing unit, and the M second PCIe interfaces are respectively connected to the M first PCIe interfaces.
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公开(公告)号：US08917621B2
公开(公告)日：2014-12-23
申请号：US13715349
申请日：2012-12-14
Applicant: Huawei Technologies Co., Ltd.
Inventor： Jinfang Zhang , Haihua Shen , Gang Huang , Wenliang Liang , Bojie Li
CPC classification number: H04W24/02 , H04L1/1812 , H04L1/1854
Abstract: A method for obtaining feedback delay includes: obtaining a target time elapsed in a process from when a remote radio end receives uplink data sent from a user end to when the remote radio end sends out feedback information responsive to the uplink data to the user end, wherein the feedback information responsive to the uplink data is fed back by a processing node to the remote radio end; calculating a feedback delay by adding the target time and an air interface transmission propagation delay, wherein the air interface transmission propagation delay is a transmission time of the uplink data from the user end to the remote radio end; and configuring, by the processing node, an uplink hybrid automatic repeat request (HARQ) ACK/NACK feedback interval to be the feedback delay.
Abstract translation: 用于获得反馈延迟的方法包括：获得从远程无线电终端接收到从用户端发送的上行链路数据到远程无线电端响应于上行链路数据向用户端发送反馈信息的过程中经过的目标时间， 其中响应于上行链路数据的反馈信息由处理节点反馈给远程无线电端; 通过增加目标时间和空中接口传输传播延迟来计算反馈延迟，其中空中接口传输传播延迟是从用户端到远程无线电端的上行链路数据的传输时间; 以及由处理节点将上行链路混合自动重传请求（HARQ）ACK / NACK反馈间隔配置为反馈延迟。
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公开(公告)号：US10826464B2
公开(公告)日：2020-11-03
申请号：US15650619
申请日：2017-07-14
Applicant: Huawei Technologies Co., Ltd.
Inventor： Liang Zhuang , Ganghua Yang , Wenliang Liang
Abstract: Embodiments of the present invention provide a signal processing method and apparatus. The method includes: performing M-way filtering on an input signal to obtain M filtered signals, performing extraction on M filtered signals separately to obtain M extracted signals, performing fast Fourier transform (FFT) on the M extracted signals separately to obtain M frequency-domain signals, and finally determining output signals according to the M frequency-domain signals. According to the embodiments of the present invention, signal filtering and extraction are performed and then FFT is performed.
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Patent Agency Ranking
公开(公告)号：US10402119B2
公开(公告)日：2019-09-03
申请号：US15789011
申请日：2017-10-20
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Shougang Chai , Wenliang Liang , Liang Zhuang
Abstract: The present disclosure provides a data format conversion apparatus and method, and a buffer chip. The data format conversion apparatus is disposed on the buffer chip in a memory; a control module is disposed for sending a control instruction to a conversion module when obtaining a data copy command; and a conversion module is disposed for completing data format conversion and storage address mapping on to-be-converted data according to the received control instruction. In this way, a prior-art problem of additionally occupying computing resources and computation time of an accelerated computation unit due to a data format conversion unit disposed in the accelerated computation unit is avoided, the amount of data transmission between a main memory and a device memory is reduced without additionally occupying computing resources, and the computation precision is ensured while the computation efficiency is improved.
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公开(公告)号：US20170317663A1
公开(公告)日：2017-11-02
申请号：US15650619
申请日：2017-07-14
Applicant: Huawei Technologies Co., Ltd.
Inventor： Liang Zhuang , Ganghua Yang , Wenliang Liang
Abstract: Embodiments of the present invention provide a signal processing method and apparatus. The method includes: performing M-way filtering on an input signal to obtain M filtered signals, performing extraction on M filtered signals separately to obtain M extracted signals, performing fast Fourier transform (FFT) on the M extracted signals separately to obtain M frequency-domain signals, and finally determining output signals according to the M frequency-domain signals. According to the embodiments of the present invention, signal filtering and extraction are performed and then FFT is performed.
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公开(公告)号：US20170064714A1
公开(公告)日：2017-03-02
申请号：US15349476
申请日：2016-11-11
Applicant: Huawei Technologies Co., Ltd.
Inventor： Gang Huang , Wenliang Liang , Haihua Shen
CPC classification number: H04W72/0453 , H04L5/0005 , H04L5/0042 , H04L12/28 , H04L12/403 , H04L29/08 , H04W72/10
Abstract: A data transmission method includes dividing a channel into two sub-channels at a node, where the node is a point at which the channel and a backplane intersect; and performing data transmission with at least one server using the sub-channels. In this process, each sub-channel obtained by means of division can exclusively use all bandwidth of an original channel, so that a server can be connected to a switch using a plurality of sub-channels and occupy bandwidth of a plurality of channels. Therefore, in the embodiments of the present disclosure, a low-bandwidth switch can be used to implement large-scale real-time data exchange in a centralized data processing process, thereby reducing costs of the switch to some extent.
Abstract translation: 数据传输方法包括将信道划分成节点处的两个子信道，其中节点是信道和背板相交的点; 以及使用所述子信道与至少一个服务器执行数据传输。 在该处理中，通过划分获得的每个子信道可以排他地使用原始信道的所有带宽，使得可以使用多个子信道将服务器连接到交换机并占用多个信道的带宽。 因此，在本公开的实施例中，低带宽交换机可以用于在集中式数据处理过程中实现大规模实时数据交换，从而在一定程度上降低了交换机的成本。
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公开(公告)号：US20180039446A1
公开(公告)日：2018-02-08
申请号：US15789011
申请日：2017-10-20
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Shougang CHAI , Wenliang Liang , Liang Zhuang
IPC: G06F3/06
CPC classification number: G06F3/0656 , G06F3/0613 , G06F3/0673 , G06F7/00 , G06F9/30014 , G06F9/30025 , G06F9/3004 , G06F9/3881
Abstract: The present disclosure provides a data format conversion apparatus and method, and a buffer chip. The data format conversion apparatus is disposed on the buffer chip in a memory; a control module is disposed for sending a control instruction to a conversion module when obtaining a data copy command; and a conversion module is disposed for completing data format conversion and storage address mapping on to-be-converted data according to the received control instruction. In this way, a prior-art problem of additionally occupying computing resources and computation time of an accelerated computation unit due to a data format conversion unit disposed in the accelerated computation unit is avoided, the amount of data transmission between a main memory and a device memory is reduced without additionally occupying computing resources, and the computation precision is ensured while the computation efficiency is improved.
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公开(公告)号：US20170221175A1
公开(公告)日：2017-08-03
申请号：US15493687
申请日：2017-04-21
Applicant: Huawei Technologies Co., Ltd.
Inventor： Wenliang Liang , Liang Zhuang
CPC classification number: G06T1/20 , G06F13/4282 , G06F2213/0026 , G06T1/00
Abstract: Embodiments of the present invention disclose an electronic device and a graphics processing unit card, which can improve data input and output capabilities. The electronic device includes a graphics processing unit card and a mainboard. The graphics processing unit card includes a main chip and M first PCIe interfaces electrically connected to the main chip, where M is an integer greater than or equal to 2. The mainboard includes a processing unit and M second PCIe interfaces connected to the processing unit, and the M second PCIe interfaces are respectively connected to the M first PCIe interfaces.
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