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公开(公告)号：US08587609B1
公开(公告)日：2013-11-19
申请号：US12510834
申请日：2009-07-28
Applicant: Haohong Wang , Yunsen Chin , Li Sha , Shuhua Xiang
Inventor： Haohong Wang , Yunsen Chin , Li Sha , Shuhua Xiang
CPC classification number: G06T11/40 , G06T11/203 , G09G5/246 , G09G5/28
Abstract: Embodiments of the present invention provide methods and associated architecture of accuracy adaptive and scalable vector graphics rendering including rendering a graphic comprising a plurality of line segments by processing each of the plurality of line segments in a first pass, and processing each of a plurality of pixels through which the plurality of line segments pass in a second pass, automatically detecting one or more rendering errors of the graphic, and correcting the one or more rendering errors. Other embodiments may be described and/or claimed.
Abstract translation: 本发明的实施例提供了精度自适应和可缩放的矢量图形渲染的方法和相关架构，包括通过在第一遍中处理多个线段中的每一个来渲染包括多个线段的图形，以及处理多个像素 多个线段通过其通过第二遍，自动检测图形的一个或多个渲染错误，以及校正一个或多个渲染错误。 可以描述和/或要求保护其他实施例。
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公开(公告)号：US08878870B1
公开(公告)日：2014-11-04
申请号：US12533554
申请日：2009-07-31
Applicant: Satish Kumar Vutukuri , Haohong Wang , Li Sha , Tao Xie , Ching-Han Tsai , Tzun-Wei Lee , Leung Chung Lai , Shuhua Xiang
Inventor： Satish Kumar Vutukuri , Haohong Wang , Li Sha , Tao Xie , Ching-Han Tsai , Tzun-Wei Lee , Leung Chung Lai , Shuhua Xiang
CPC classification number: G09G5/377 , G06F3/14 , G09G5/14 , G09G2310/0229 , G09G2340/125 , G09G2350/00
Abstract: Embodiments of the present invention provide graphic processing techniques and configurations including an apparatus comprising a storage medium having stored therein a table comprising information about respective positions and sizes of a number of rectangular blocks, the rectangular blocks to substantially form at least one plane having an arbitrary shape object, and at least one overlay engine operatively coupled with the table and associated with the at least one plane to request the information about the respective positions and the sizes of the number of rectangular blocks to provide graphics overlay of the arbitrary shape object. Other embodiments may be described and/or claimed.
Abstract translation: 本发明的实施例提供了图形处理技术和配置，其包括包括存储介质的设备，其中存储有包括关于多个矩形块的相应位置和大小的信息的表格，矩形块基本上形成至少一个具有任意 以及至少一个覆盖引擎，其可操作地与所述工作台耦合并与所述至少一个平面相关联，以请求关于矩形块的数量的相应位置和尺寸的信息以提供所述任意形状对象的图形叠加。 可以描述和/或要求保护其他实施例。
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公开(公告)号：US08477146B2
公开(公告)日：2013-07-02
申请号：US12511238
申请日：2009-07-29
Applicant: Shuhua Xiang , Li Sha , Ching-Han Tsai
Inventor： Shuhua Xiang , Li Sha , Ching-Han Tsai
CPC classification number: H04N19/423 , H04N19/433 , H04N19/44 , H04N19/61
Abstract: Devices, methods, and other embodiments associated with processing rasterized data are described. In one embodiment, an apparatus includes translation logic for converting lines of rasterized pixel data of a compressed image to a plurality of two-dimensional data blocks. The lines of rasterized pixel data are stored in consecutive memory locations. Each data block is stored in a consecutive memory location. The apparatus includes decompression logic for at least partially decompressing the compressed image based, at least in part, on the two-dimensional data blocks.
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公开(公告)号：US07085320B2
公开(公告)日：2006-08-01
申请号：US09953053
申请日：2001-09-14
Applicant: He Ouyang , Li Sha , Shuhua Xiang , Yaojun Luo , Weimin Zeng , Jun Ding
Inventor： He Ouyang , Li Sha , Shuhua Xiang , Yaojun Luo , Weimin Zeng , Jun Ding
IPC: H04B7/12
CPC classification number: H04N21/440218 , H04N19/12 , H04N19/40 , H04N19/42 , H04N19/61
Abstract: A video compression scheme enables the user to select one of many video compression formats, including the widely-used standard video formats such as MPEG-1, MPEG-2, MPEG-4 and H.263. In one embodiment, the scheme is implemented as a hardware-software combination, with the hardware portion, preferably implemented as an ASIC chip, performing the core compression and the software portion dealing with the detailed formatting. In another embodiment, a 32-bit aligned transitional data format is used.
Abstract translation: 视频压缩方案使得用户能够选择许多视频压缩格式之一，包括广泛使用的标准视频格式，如MPEG-1，MPEG-2，MPEG-4和H.263。 在一个实施例中，该方案被实现为硬件 - 软件组合，硬件部分优选地实现为ASIC芯片，执行核心压缩以及处理详细格式化的软件部分。 在另一个实施例中，使用32位对齐的过渡数据格式。
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5.发明授权Processing unit with cross-coupled ALUs/accumulators and input data feedback structure including constant generator and bypass to reduce memory contention 失效处理单元具有交叉耦合的ALU /累加器和输入数据反馈结构，包括恒定发生器和旁路以减少内存争用公开(公告)号：US06996702B2
公开(公告)日：2006-02-07
申请号：US10209109
申请日：2002-07-30
Applicant: Shuhua Xiang , Li Sha , Ping Zhu , Hongjun Yuan , Wei Ni
Inventor： Shuhua Xiang , Li Sha , Ping Zhu , Hongjun Yuan , Wei Ni
IPC: G06F9/34
CPC classification number: G06F9/3867 , G06F7/57 , G06F9/3824 , G06F9/3826 , G06F9/3885
Abstract: A processing system includes an arithmetic logic unit (ALU) sub-system that allows data associated with a prior instruction to be preserved for use with a next instruction or subsequent instruction without having to reload the value using an intermediate register. The ALU sub-system includes a pair of ALUs communicatively cross-coupled with a pair of accumulators. The processing system also includes a data selector coupled to the ALU sub-system for use with memory contention prediction. The data selector includes a constant generator that controls storage of data associated with a previous instruction in a bypass element, and a selector to choose between data from a databus element and data stored in the bypass element.
Abstract translation: 处理系统包括算术逻辑单元（ALU）子系统，其允许与先前指令相关联的数据被保留以用于下一个指令或后续指令，而不必使用中间寄存器重新加载该值。 ALU子系统包括与一对蓄能器通信地交叉耦合的一对ALU。 处理系统还包括耦合到ALU子系统以与存储器争用预测一起使用的数据选择器。 数据选择器包括恒定发生器，其控制与旁路元件中的先前指令相关联的数据的存储，以及选择器，用于在数据总线元件的数据和存储在旁路元件中的数据之间进行选择。
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Patent Agency Ranking
公开(公告)号：US20050207488A1
公开(公告)日：2005-09-22
申请号：US09924140
申请日：2001-08-07
Applicant: He Ouyang , Li Sha , Shuhua Xiang , Ping Zhu , Yaojun Luo
Inventor： He Ouyang , Li Sha , Shuhua Xiang , Ping Zhu , Yaojun Luo
CPC classification number: G06F17/147 , H04N19/423 , H04N19/43 , H04N19/61
Abstract: A method, apparatus, computer medium, and other embodiments for discrete cosine transform and inverse discrete cosine transform (DCT/IDCT) of image signals are described. A DCT/IDCT module includes a plurality of different cores. One embodiment of a core includes two sets of lookup tables to provide multiplication and add operations for the DCT and IDCT functions. Another embodiment of a core include one set of lookup tables, while another embodiment of a core includes no lookup table. The DCT/IDCT module provides forward DCT and IDCT functionality without the use of additional multipliers.
Abstract translation: 描述了用于图像信号的离散余弦变换和逆离散余弦变换（DCT / IDCT）的方法，装置，计算机介质和其他实施例。 DCT / IDCT模块包括多个不同的核。 核心的一个实施例包括两组查找表，用于为DCT和IDCT功能提供乘法和加法运算。 核心的另一实施例包括一组查找表，而核心的另一实施例不包括查找表。 DCT / IDCT模块提供前向DCT和IDCT功能，而不需要使用额外的乘法器。
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7.发明申请PROCESSING UNIT WITH CROSS-COUPLED ALUS/ACCUMULATORS AND INPUT DATA FEEDBACK STRUCTURE INCLUDING CONSTANT GENERATOR AND BYPASS TO REDUCE MEMORY CONTENTION 失效具有交叉耦合ALUS /累加器的加工单元和输入数据反馈结构，包括恒定发电机和旁路以减少存储器内容公开(公告)号：US20050228970A1
公开(公告)日：2005-10-13
申请号：US10209109
申请日：2002-07-30
Applicant: Shuhua Xiang , Li Sha , Ping Zhu , Hongjun Yuan , Wei Ni
Inventor： Shuhua Xiang , Li Sha , Ping Zhu , Hongjun Yuan , Wei Ni
CPC classification number: G06F9/3867 , G06F7/57 , G06F9/3824 , G06F9/3826 , G06F9/3885
Abstract: A processing system includes an arithmetic logic unit (ALU) sub-system that allows data associated with a prior instruction to be preserved for use with a next instruction or subsequent instruction without having to reload the value using an intermediate register. The ALU sub-system includes a pair of ALUs communicatively cross-coupled with a pair of accumulators. The processing system also includes a data selector coupled to the ALU sub-system for use with memory contention prediction. The data selector includes a constant generator that controls storage of data associated with a previous instruction in a bypass element, and a selector to choose between data from a databus element and data stored in the bypass element.
Abstract translation: 处理系统包括算术逻辑单元（ALU）子系统，其允许与先前指令相关联的数据被保留以用于下一个指令或后续指令，而不必使用中间寄存器重新加载该值。 ALU子系统包括与一对蓄能器通信地交叉耦合的一对ALU。 处理系统还包括耦合到ALU子系统以与存储器争用预测一起使用的数据选择器。 数据选择器包括恒定发生器，其控制与旁路元件中的先前指令相关联的数据的存储，以及选择器，用于在数据总线元件的数据和存储在旁路元件中的数据之间进行选择。
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8.发明申请公开(公告)号：US20050213661A1
公开(公告)日：2005-09-29
申请号：US09924079
申请日：2001-08-07
Applicant: Shuhua Xiang , Li Sha , Yaojun Luo
Inventor： Shuhua Xiang , Li Sha , Yaojun Luo
CPC classification number: H04N19/523 , G06T7/223 , G06T2207/10016 , H04N5/145 , H04N19/43 , H04N19/53
Abstract: A method, apparatus, computer medium, and other embodiments for motion estimation and compensation processing of video and image signals are described. Within a sequence of frames, block-based differences are taken between frames to exploit redundancies between pictures by taking a matchblock from the current picture and by determining a spatial offset in a corresponding reference picture which signifies a good prediction of where the current macroblock can be found. Multi-level motion estimation is performed in three stages to refine the resolution of the motion vector with reduced computational bandwidth. First, a matchblock from a reference frame is decomposed equally into several sub-matchblocks, each of which is searched in parallel over a search area decomposed into sub-blocks by a similar factor so as to determine a preliminary motion vector in the reference picture. Second, a full size matchblock is then searched over a refined search area using the preliminary motion vector to determine an intermediate motion vector, so as to refine the resolution of the preliminary motion vector. Third, fractional-pixel searching is then performed on the matchblock and the intermediate motion vector to determine a final motion vector having an even higher resolution associated with the best motion vector to be used in predicting the current macroblock. In one embodiment, a processor-based motion estimation and compensation cell array enables contemporaneous and independent loading and processing operations in parallel.
Abstract translation: 描述了用于视频和图像信号的运动估计和补偿处理的方法，装置，计算机介质和其它实施例。 在一系列帧内，在帧之间采用基于块的差异，以通过从当前图像获取匹配块并且通过确定相应参考图片中的空间偏移来表示图像之间的冗余，其表示对当前宏块可以在何处的良好预测 发现。 多级运动估计分三个阶段进行，以减少计算带宽的细化运动矢量的分辨率。 首先，来自参考帧的匹配块被分解为几个子匹配块，每个子块通过相似的因素并行地搜索到被分解成子块的搜索区域，以便确定参考图片中的初步运动矢量。 其次，使用初步运动向量，在精细搜索区域上搜索全尺寸匹配块，以确定中间运动矢量，以便精细化预备运动矢量的分辨率。 第三，然后对匹配块和中间运动矢量执行分数像素搜索，以确定具有与用于预测当前宏块的最佳运动矢量相关联的更高分辨率的最终运动矢量。 在一个实施例中，基于处理器的运动估计和补偿单元阵列能够并行地实现同时且独立的加载和处理操作。
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公开(公告)号：US07142251B2
公开(公告)日：2006-11-28
申请号：US10210254
申请日：2002-07-31
Applicant: Li Sha , Shuhua Xiang , Yaojun Luo , He Ouyang
Inventor： Li Sha , Shuhua Xiang , Yaojun Luo , He Ouyang
IPC: H04N9/46
CPC classification number: H04N19/61
Abstract: A video input processor is provided to process different input video format, including RGB, RGB Bayer, YUV 4:2:2 interlaced and progressive video data. The video input processor also uses an advanced algorithm to efficiently convert video data in RGB color space to YUV color space. The video input processor further enables multi-functions such as video image scaling, video image filtering before the video data are output for further video compression.
Abstract translation: 提供视频输入处理器来处理不同的输入视频格式，包括RGB，RGB拜耳，YUV 4：2：2隔行和逐行视频数据。 视频输入处理器还使用高级算法将RGB色彩空间中的视频数据有效地转换为YUV色彩空间。 视频输入处理器进一步实现诸如视频图像缩放，视频数据输出之前的视频图像滤波等多功能，用于进一步的视频压缩。
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公开(公告)号：US07035332B2
公开(公告)日：2006-04-25
申请号：US09924140
申请日：2001-08-07
Applicant: Ouyang He , Li Sha , Shuhua Xiang , Ping Zhu , Yaojun Luo
Inventor： Ouyang He , Li Sha , Shuhua Xiang , Ping Zhu , Yaojun Luo
IPC: H04B1/66
CPC classification number: G06F17/147 , H04N19/423 , H04N19/43 , H04N19/61
Abstract: A method, apparatus, computer medium, and other embodiments for discrete cosine transform and inverse discrete cosine transform (DCT/IDCT) of image signals are described. A DCT/IDCT module includes a plurality of different cores. One embodiment of a core includes two sets of lookup tables to provide multiplication and add operations for the DCT and IDCT functions. Another embodiment of a core include one set of lookup tables, while another embodiment of a core includes no lookup table. The DCT/IDCT module provides forward DCT and IDCT functionality without the use of additional multipliers.
Abstract translation: 描述了用于图像信号的离散余弦变换和逆离散余弦变换（DCT / IDCT）的方法，装置，计算机介质和其他实施例。 DCT / IDCT模块包括多个不同的核。 核心的一个实施例包括两组查找表，用于为DCT和IDCT功能提供乘法和加法运算。 核心的另一实施例包括一组查找表，而核心的另一实施例不包括查找表。 DCT / IDCT模块提供前向DCT和IDCT功能，而不需要使用额外的乘法器。
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