公开(公告)号：US08494059B1

公开(公告)日：2013-07-23

申请号：US12511425

申请日：2009-07-29

Applicant: Hongjie Guan ,  Junqiang Lan ,  Yaojun Luo ,  Guan-Ming Su ,  Ching-Han Tsai ,  Chi-Kuang Chen ,  Li Sha

Inventor： Hongjie Guan ,  Junqiang Lan ,  Yaojun Luo ,  Guan-Ming Su ,  Ching-Han Tsai ,  Chi-Kuang Chen ,  Li Sha

IPC: H04N11/02

CPC classification number: H04N19/423 ,  H04N19/44 ,  H04N19/91

Abstract: Devices, systems, methods, and other embodiments associated with a buffer controller are described. In one embodiment, an apparatus includes a buffer to buffer data. The apparatus further includes a status register and control logic. The control logic at least processes write commands. When the buffer is full and a write command to write data to the buffer is received, the control logic is configured to: accept the data without writing the data to the buffer, send an acknowledgment that the buffer was written, and set an overflow bit in the status register.

Abstract translation: 描述了与缓冲器控制器相关联的设备，系统，方法和其他实施例。 在一个实施例中，装置包括缓冲器以缓冲数据。 该装置还包括状态寄存器和控制逻辑。 控制逻辑至少处理写命令。 当缓冲区已满并且写入数据到缓冲区的写入命令被接收时，控制逻辑被配置为：接收数据而不将数据写入缓冲器，发送缓冲区被写入的确认，并设置溢出位 在状态寄存器中。

公开(公告)号：US20060126725A1

公开(公告)日：2006-06-15

申请号：US11123582

申请日：2005-05-05

Applicant: Weimin Zeng ,  Yaojun Luo ,  Yu Tian

Inventor： Weimin Zeng ,  Yaojun Luo ,  Yu Tian

IPC: H04N11/04 ,  H04B1/66 ,  H04N11/02 ,  H04N7/12

CPC classification number: H04N17/004 ,  H04N19/61 ,  H04N19/70

Abstract: According to one embodiment, the present invention generates a test vector for verification of a video encoder or decoder by encoding video data using a permissible combination of parameters. One embodiment of the present invention provides for verification of a video decoder by performing at least one video decoding operation and comparing a resulting partially or fully decoded test vector to an expected value. Another embodiment of the present invention provides for verification of a video encoder by performing at least one video encoding operation using a selected combination of parameters, and comparing a resulting partially or fully encoded test vector to an expected value.

Abstract translation: 根据一个实施例，本发明通过使用允许的参数组合对视频数据进行编码来生成用于验证视频编码器或解码器的测试向量。 本发明的一个实施例通过执行至少一个视频解码操作并将得到的部分或完全解码的测试向量与预期值进行比较来提供视频解码器的验证。 本发明的另一实施例提供了通过使用所选择的参数组合执行至少一个视频编码操作并且将得到的部分或完全编码的测试向量与预期值进行比较来验证视频编码器。

公开(公告)号：US06970509B2

公开(公告)日：2005-11-29

申请号：US09924079

申请日：2001-08-07

Applicant: Shuhua Xiang ,  Li Sha ,  Yaojun Luo

Inventor： Shuhua Xiang ,  Li Sha ,  Yaojun Luo

IPC: G06T7/20 ,  H04N5/14 ,  H04N7/12 ,  H04N7/18 ,  H04N7/26

CPC classification number: H04N19/523 ,  G06T7/223 ,  G06T2207/10016 ,  H04N5/145 ,  H04N19/43 ,  H04N19/53

Abstract: A method, apparatus, computer medium, and other embodiments for motion estimation and compensation processing of video and image signals are described. Within a sequence of frames, block-based differences are taken between frames to exploit redundancies between pictures by taking a matchblock from the current picture and by determining a spatial offset in a corresponding reference picture which signifies a good prediction of where the current macroblock can be found. Multi-level motion estimation is performed in three stages to refine the resolution of the motion vector with reduced computational bandwidth. First, a matchblock from a reference frame is decomposed equally into several sub-matchblocks, each of which is searched in parallel over a search area decomposed into sub-blocks by a similar factor so as to determine a preliminary motion vector in the reference picture. Second, a full size matchblock is then searched over a refined search area using the preliminary motion vector to determine an intermediate motion vector, so as to refine the resolution of the preliminary motion vector. Third, fractional-pixel searching is then performed on the matchblock and the intermediate motion vector to determine a final motion vector having an even higher resolution associated with the best motion vector to be used in predicting the current macroblock. In one embodiment, a processor-based motion estimation and compensation cell array enables contemporaneous and independent loading and processing operations in parallel.

Abstract translation: 描述了用于视频和图像信号的运动估计和补偿处理的方法，装置，计算机介质和其它实施例。 在一系列帧内，在帧之间采用基于块的差异，以通过从当前图像获取匹配块并且通过确定相应参考图片中的空间偏移来表示图像之间的冗余，其表示对当前宏块可以在何处的良好预测 发现。 多级运动估计分三个阶段进行，以减少计算带宽的细化运动矢量的分辨率。 首先，来自参考帧的匹配块被分解为几个子匹配块，每个子块通过相似的因素并行地搜索到被分解成子块的搜索区域，以便确定参考图片中的初步运动矢量。 其次，使用初步运动向量，在精细搜索区域上搜索全尺寸匹配块，以确定中间运动矢量，以便精细化预备运动矢量的分辨率。 第三，然后对匹配块和中间运动矢量执行分数像素搜索，以确定具有与用于预测当前宏块的最佳运动矢量相关联的更高分辨率的最终运动矢量。 在一个实施例中，基于处理器的运动估计和补偿单元阵列能够并行地实现同时且独立的加载和处理操作。

公开(公告)号：US07142251B2

公开(公告)日：2006-11-28

申请号：US10210254

申请日：2002-07-31

Applicant: Li Sha ,  Shuhua Xiang ,  Yaojun Luo ,  He Ouyang

Inventor： Li Sha ,  Shuhua Xiang ,  Yaojun Luo ,  He Ouyang

IPC: H04N9/46

CPC classification number: H04N19/61

Abstract: A video input processor is provided to process different input video format, including RGB, RGB Bayer, YUV 4:2:2 interlaced and progressive video data. The video input processor also uses an advanced algorithm to efficiently convert video data in RGB color space to YUV color space. The video input processor further enables multi-functions such as video image scaling, video image filtering before the video data are output for further video compression.

Abstract translation: 提供视频输入处理器来处理不同的输入视频格式，包括RGB，RGB拜耳，YUV 4：2：2隔行和逐行视频数据。 视频输入处理器还使用高级算法将RGB色彩空间中的视频数据有效地转换为YUV色彩空间。 视频输入处理器进一步实现诸如视频图像缩放，视频数据输出之前的视频图像滤波等多功能，用于进一步的视频压缩。

公开(公告)号：US07035332B2

公开(公告)日：2006-04-25

申请号：US09924140

申请日：2001-08-07

Applicant: Ouyang He ,  Li Sha ,  Shuhua Xiang ,  Ping Zhu ,  Yaojun Luo

Inventor： Ouyang He ,  Li Sha ,  Shuhua Xiang ,  Ping Zhu ,  Yaojun Luo

IPC: H04B1/66

CPC classification number: G06F17/147 ,  H04N19/423 ,  H04N19/43 ,  H04N19/61

Abstract: A method, apparatus, computer medium, and other embodiments for discrete cosine transform and inverse discrete cosine transform (DCT/IDCT) of image signals are described. A DCT/IDCT module includes a plurality of different cores. One embodiment of a core includes two sets of lookup tables to provide multiplication and add operations for the DCT and IDCT functions. Another embodiment of a core include one set of lookup tables, while another embodiment of a core includes no lookup table. The DCT/IDCT module provides forward DCT and IDCT functionality without the use of additional multipliers.

Abstract translation: 描述了用于图像信号的离散余弦变换和逆离散余弦变换（DCT / IDCT）的方法，装置，计算机介质和其他实施例。 DCT / IDCT模块包括多个不同的核。 核心的一个实施例包括两组查找表，用于为DCT和IDCT功能提供乘法和加法运算。 核心的另一实施例包括一组查找表，而核心的另一实施例不包括查找表。 DCT / IDCT模块提供前向DCT和IDCT功能，而不需要使用额外的乘法器。

公开(公告)号：US20050226324A1

公开(公告)日：2005-10-13

申请号：US09953053

申请日：2001-09-14

Applicant: He Ouyang ,  Li Sha ,  Shuhua Xiang ,  Yaojun Luo ,  Weimin Zeng ,  Jun Ding

Inventor： He Ouyang ,  Li Sha ,  Shuhua Xiang ,  Yaojun Luo ,  Weimin Zeng ,  Jun Ding

IPC: H04N7/12 ,  H04N7/26 ,  H04N7/50

CPC classification number: H04N21/440218 ,  H04N19/12 ,  H04N19/40 ,  H04N19/42 ,  H04N19/61

Abstract: A video compression scheme enables the user to select one of many video compression formats, including the widely-used standard video formats such as MPEG-1, MPEG-2, MPEG-4 and H.263. In one embodiment, the scheme is implemented as a hardware-software combination, with the hardware portion, preferably implemented as an ASIC chip, performing the core compression and the software portion dealing with the detailed formatting. In another embodiment, a 32-bit aligned transitional data format is used.

Abstract translation: 视频压缩方案使得用户能够选择许多视频压缩格式之一，包括广泛使用的标准视频格式，如MPEG-1，MPEG-2，MPEG-4和H.263。 在一个实施例中，该方案被实现为硬件 - 软件组合，硬件部分优选地实现为ASIC芯片，执行核心压缩以及处理详细格式化的软件部分。 在另一个实施例中，使用32位对齐的过渡数据格式。

公开(公告)号：US08811496B1

公开(公告)日：2014-08-19

申请号：US12511290

申请日：2009-07-29

Applicant: Yaojun Luo ,  Junqiang Lan ,  Hongjie Guan ,  Chi-Kuang Chen ,  Li Sha ,  Ching-Han Tsai

Inventor： Yaojun Luo ,  Junqiang Lan ,  Hongjie Guan ,  Chi-Kuang Chen ,  Li Sha ,  Ching-Han Tsai

IPC: H04N7/18 ,  H04N11/02 ,  H04N11/04

CPC classification number: H04N19/423 ,  H04N19/44 ,  H04N19/91

Abstract: Devices, systems, methods, and other embodiments associated with decoding image data are described. In one embodiment, an apparatus decoding a bitstream includes a parser that parses a command that includes instructions for decoding a syntax element bitstream from the bitstream. The parser functions to identify a number times to repeat the command and to identify a table associated with the syntax element bitstream based, at least in part, on a table identification (ID) in the command. A decoder decodes the syntax element bitstream as specified by the command based, at least in part, on retrieving a value in a table associated with the table ID to generate a syntax element.

Abstract translation: 描述了与解码图像数据相关联的设备，系统，方法和其他实施例。 在一个实施例中，解码比特流的装置包括分析器，其解析包括用于从比特流解码语法元素比特流的指令的命令。 解析器用于至少部分地基于命令中的表标识（ID）来识别重复该命令的次数并且识别与语法元素比特流相关联的表。 解码器至少部分地解码由命令所指定的语法元素比特流，该方法至少部分地检索与表ID相关联的表中的值以生成语法元素。

公开(公告)号：US08498342B1

公开(公告)日：2013-07-30

申请号：US12511629

申请日：2009-07-29

Applicant: Li Sha ,  Ching-Han Tsai ,  Chi-Kuang Chen ,  Yaojun Luo ,  Guan-Ming Su ,  Ye Zhou

Inventor： Li Sha ,  Ching-Han Tsai ,  Chi-Kuang Chen ,  Yaojun Luo ,  Guan-Ming Su ,  Ye Zhou

IPC: H04N11/02

CPC classification number: H04N19/44 ,  H04N19/423 ,  H04N19/43 ,  H04N19/86

Abstract: This disclosure describes tools capable of generating messages for use in deblocking filtering a video stream, the messages based on prediction parameters extracted from the video stream.

Abstract translation: 本公开描述了能够生成用于去视频流过滤的消息的工具，该消息基于从视频流中提取的预测参数。

公开(公告)号：US20050206784A1

公开(公告)日：2005-09-22

申请号：US10210254

申请日：2002-07-31

Applicant: Sha Li ,  Shuhua Xiang ,  Yaojun Luo ,  He Ouyang

Inventor： Sha Li ,  Shuhua Xiang ,  Yaojun Luo ,  He Ouyang

IPC: H04N7/50 ,  H04N11/20

CPC classification number: H04N19/61

Abstract: A video input processor is provided to process different input video format, including RGB, RGB Bayer, YUV 4:2:2 interlaced and progressive video data. The video input processor also uses an advanced algorithm to efficiently convert video data in RGB color space to YUV color space. The video input processor further enables multi-functions such as video image scaling, video image filtering before the video data are output for further video compression.

Abstract translation: 提供视频输入处理器来处理不同的输入视频格式，包括RGB，RGB拜耳，YUV 4：2：2隔行和逐行视频数据。 视频输入处理器还使用高级算法将RGB色彩空间中的视频数据有效地转换为YUV色彩空间。 视频输入处理器进一步实现诸如视频图像缩放，视频数据输出之前的视频图像滤波等多功能，用于进一步的视频压缩。

公开(公告)号：US07085320B2

公开(公告)日：2006-08-01

申请号：US09953053

申请日：2001-09-14

Applicant: He Ouyang ,  Li Sha ,  Shuhua Xiang ,  Yaojun Luo ,  Weimin Zeng ,  Jun Ding

Inventor： He Ouyang ,  Li Sha ,  Shuhua Xiang ,  Yaojun Luo ,  Weimin Zeng ,  Jun Ding

IPC: H04B7/12

CPC classification number: H04N21/440218 ,  H04N19/12 ,  H04N19/40 ,  H04N19/42 ,  H04N19/61

Abstract: A video compression scheme enables the user to select one of many video compression formats, including the widely-used standard video formats such as MPEG-1, MPEG-2, MPEG-4 and H.263. In one embodiment, the scheme is implemented as a hardware-software combination, with the hardware portion, preferably implemented as an ASIC chip, performing the core compression and the software portion dealing with the detailed formatting. In another embodiment, a 32-bit aligned transitional data format is used.

Abstract translation: 视频压缩方案使得用户能够选择许多视频压缩格式之一，包括广泛使用的标准视频格式，如MPEG-1，MPEG-2，MPEG-4和H.263。 在一个实施例中，该方案被实现为硬件 - 软件组合，硬件部分优选地实现为ASIC芯片，执行核心压缩以及处理详细格式化的软件部分。 在另一个实施例中，使用32位对齐的过渡数据格式。