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1.
公开(公告)号:US08587609B1
公开(公告)日:2013-11-19
申请号:US12510834
申请日:2009-07-28
Applicant: Haohong Wang , Yunsen Chin , Li Sha , Shuhua Xiang
Inventor: Haohong Wang , Yunsen Chin , Li Sha , Shuhua Xiang
CPC classification number: G06T11/40 , G06T11/203 , G09G5/246 , G09G5/28
Abstract: Embodiments of the present invention provide methods and associated architecture of accuracy adaptive and scalable vector graphics rendering including rendering a graphic comprising a plurality of line segments by processing each of the plurality of line segments in a first pass, and processing each of a plurality of pixels through which the plurality of line segments pass in a second pass, automatically detecting one or more rendering errors of the graphic, and correcting the one or more rendering errors. Other embodiments may be described and/or claimed.
Abstract translation: 本发明的实施例提供了精度自适应和可缩放的矢量图形渲染的方法和相关架构,包括通过在第一遍中处理多个线段中的每一个来渲染包括多个线段的图形,以及处理多个像素 多个线段通过其通过第二遍,自动检测图形的一个或多个渲染错误,以及校正一个或多个渲染错误。 可以描述和/或要求保护其他实施例。
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2.
公开(公告)号:US08427497B1
公开(公告)日:2013-04-23
申请号:US12512963
申请日:2009-07-30
Applicant: Yunsen Chin , Haohong Wang
Inventor: Yunsen Chin , Haohong Wang
CPC classification number: G09G5/39 , G09G2360/121 , G09G2360/122
Abstract: Methods, software, and apparatuses for graphics processing, including caching pixel data of one or more tiles of a graphics surface. Methods generally include setting a caching bit corresponding to the surface, setting tile pattern bits corresponding to tiles in the surface, and when the caching bit is active, storing one or more pixel values in a cache memory. When at least one tile contains pixels having the same value for at least one predetermined parameter, the caching bit and the corresponding tile pattern bits may be active. Apparatuses generally include a pixel memory, a cache memory, and a controller including logic configured to reserve the caching bit, tile pattern bits, and same pixel values in cache memory when the caching bit is active.
Abstract translation: 用于图形处理的方法,软件和装置,包括缓存图形表面的一个或多个图块的像素数据。 方法通常包括设置对应于表面的缓存位,设置对应于表面中的瓦片的瓦片图案位,以及当高速缓存位有效时,将一个或多个像素值存储在高速缓冲存储器中。 当至少一个瓦片包含对于至少一个预定参数具有相同值的像素时,高速缓存位和对应的瓦片图案位可以是活动的。 装置通常包括像素存储器,高速缓存存储器和包括逻辑的控制器,该逻辑被配置为当高速缓存位有效时将高速缓存存储器中的高速缓存位,块模式位和相同的像素值保留。
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