公开(公告)号：US06518675B2

公开(公告)日：2003-02-11

申请号：US09752856

申请日：2000-12-29

申请人： Gu-Sung Kim ,  Dong-Hyeon Jang ,  Min-Young Son ,  Sa-Yoon Kang

发明人： Gu-Sung Kim ,  Dong-Hyeon Jang ,  Min-Young Son ,  Sa-Yoon Kang

IPC分类号： H01L2348

CPC分类号： H01L24/10 ,  H01L23/3157 ,  H01L23/34 ,  H01L24/06 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05555 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/351 ,  H05K1/0271 ,  H05K3/3436 ,  H01L2924/00

摘要： A thermal-stress-absorbing interface structure between a semiconductor integrated circuit chip and a surface-mount structure, and a method for manufacturing the same. The thermal-stress-absorbing interface structure comprises an elongated conductive-bump pad having a first length-wise end and a second length-wise end, and a side. The thermal-stress-absorbing interface structure includes means for allowing the first end of the pad to move up when the second end of the pad moves down and alternately allowing the first end to move down when the second end moves up, upon thermal cycling. The means has a center axis and the up-and-down movements of the pad are balanced on the center axis. In accordance with this novel structure of the present invention, interconnection reliability such as solder joint reliability can be significantly improved.

摘要翻译： 半导体集成电路芯片和表面安装结构之间的热应力吸收界面结构及其制造方法。 热应力吸收界面结构包括具有第一纵向端和第二纵向端以及侧面的细长导电凸块焊盘。 所述热应力吸收界面结构包括当所述垫的第二端向下移动时允许所述垫的第一端向上移动的装置，并且当热循环时，当所述第二端向上移动时交替允许所述第一端向下移动。 该装置具有中心轴线，并且该垫的上下移动在中心轴线上平衡。 根据本发明的这种新型结构，可以显着提高诸如焊点可靠性之类的互连可靠性。

公开(公告)号：US06836018B2

公开(公告)日：2004-12-28

申请号：US10304264

申请日：2002-11-25

申请人： Gu-Sung Kim ,  Dong-Hyeon Jang ,  Min-Young Son ,  Sa-Yoon Kang

发明人： Gu-Sung Kim ,  Dong-Hyeon Jang ,  Min-Young Son ,  Sa-Yoon Kang

IPC分类号： H01L2348

CPC分类号： H01L24/10 ,  H01L23/3157 ,  H01L23/34 ,  H01L24/06 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05555 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/351 ,  H05K1/0271 ,  H05K3/3436 ,  H01L2924/00

摘要： A thermal-stress-absorbing interface structure is provided between a semiconductor integrated circuit chip and a surface-mount structure. The interface structure comprises an elongated conductive-bump pad having a first length-wise end and a second length-wise end, and a side. The pad has an interconnection line extending from the side thereof intermediate the first and the second ends. The interconnection line is electrically connected to the chip. The interface structure further includes a first polymer layer having an exposed surface, and a second polymer layer, each having a different modulus of elasticity, disposed below the pad. The second polymer layer extends over substantially the entire exposed surface of the first polymer layer to absorb a thermal stress during thermal cycling.

摘要翻译： 在半导体集成电路芯片和表面安装结构之间提供热应力吸收界面结构。 界面结构包括具有第一纵向端和第二纵向端以及侧面的细长导电凸块垫。 垫具有从第一端和第二端的中间的一侧延伸的互连线。 互连线电连接到芯片。 界面结构还包括设置在垫下方的具有暴露表面的第一聚合物层和每个具有不同弹性模量的第二聚合物层。 第二聚合物层在第一聚合物层的基本上整个暴露的表面上延伸以在热循环期间吸收热应力。

公开(公告)号：US06586275B2

公开(公告)日：2003-07-01

申请号：US10103630

申请日：2002-03-20

申请人： Gu-Sung Kim ,  Dong-Hyeon Jang ,  Min-Young Son ,  Sa-Yoon Kang

发明人： Gu-Sung Kim ,  Dong-Hyeon Jang ,  Min-Young Son ,  Sa-Yoon Kang

IPC分类号： H01L2144

CPC分类号： H01L24/10 ,  H01L23/3157 ,  H01L23/34 ,  H01L24/06 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05555 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/351 ,  H05K1/0271 ,  H05K3/3436 ,  H01L2924/00

摘要： A thermal-stress-absorbing interface structure between a semiconductor integrated circuit chip and a surface-mount structure and a method for manufacturing the same. The thermal-stress-absorbing interface structure comprises an elongated conductive-bump pad having a first length-wise end and a second length-wise end, and a side. The thermal-stress-absorbing interface structure includes means for allowing the first end of the pad to move up when the second end of the pad moves down and alternately allowing the first end to move down when the second end moves up, upon thermal cycling. The means has a center axis and the up-and-down movements of the pad are balanced on the center axis. In accordance with this novel structure of the present invention, interconnection reliability such as solder joint reliability can be significantly improved.

摘要翻译： 半导体集成电路芯片和表面安装结构之间的热应力吸收界面结构及其制造方法。 热应力吸收界面结构包括具有第一纵向端和第二纵向端以及侧面的细长导电凸块焊盘。 所述热应力吸收界面结构包括当所述垫的第二端向下移动时允许所述垫的第一端向上移动的装置，并且当热循环时，当所述第二端向上移动时交替允许所述第一端向下移动。 该装置具有中心轴线，并且垫片的上下运动在中心轴线上平衡。根据本发明的这种新颖结构，可以显着提高诸如焊点可靠性之类的互连可靠性。

公开(公告)号：US07375426B2

公开(公告)日：2008-05-20

申请号：US11173852

申请日：2005-06-30

申请人： Suk-Chae Kang ,  Si-Hoon Lee ,  Sa-Yoon Kang ,  Dong-Han Kim ,  Yun-Hyeok Im ,  Gu-Sung Kim

发明人： Suk-Chae Kang ,  Si-Hoon Lee ,  Sa-Yoon Kang ,  Dong-Han Kim ,  Yun-Hyeok Im ,  Gu-Sung Kim

IPC分类号： H01L23/12 ,  H01L23/48

CPC分类号： H01L23/3675 ,  H01L23/13 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/12044 ,  H01L2924/15312 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a semiconductor chip, a circuit board at which a wire pattern is formed, and a metal structure including a portion inserted through an opening of the circuit board and upon which the semiconductor chip rests. With the semiconductor chip in direct contact with the metal structure, thermal characteristics improve. With the circuit board supported by the metal structure, mechanical stability improves.

摘要翻译： 半导体封装包括半导体芯片，形成有线图形的电路板，以及包括插入电路板的开口部分的半导体芯片所在的金属结构体。 随着半导体芯片与金属结构直接接触，热特性得到改善。 由于电路板由金属结构支撑，机械稳定性提高。

公开(公告)号：US20060012019A1

公开(公告)日：2006-01-19

申请号：US11173852

申请日：2005-06-30

申请人： Suk-Chae Kang ,  Si-Hoon Lee ,  Sa-Yoon Kang ,  Dong-Han Kim ,  Yun-Hyeok Im ,  Gu-Sung Kim

发明人： Suk-Chae Kang ,  Si-Hoon Lee ,  Sa-Yoon Kang ,  Dong-Han Kim ,  Yun-Hyeok Im ,  Gu-Sung Kim

IPC分类号： H01L23/02

CPC分类号： H01L23/3675 ,  H01L23/13 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/12044 ,  H01L2924/15312 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a semiconductor chip, a circuit board at which a wire pattern is formed, and a metal structure including a portion inserted through an opening of the circuit board and upon which the semiconductor chip rests. With the semiconductor chip in direct contact with the metal structure, thermal characteristics improve. With the circuit board supported by the metal structure, mechanical stability improves.

摘要翻译： 半导体封装包括半导体芯片，形成有线图形的电路板，以及包括插入电路板的开口部分的半导体芯片所在的金属结构体。 随着半导体芯片与金属结构直接接触，热特性得到改善。 由于电路板由金属结构支撑，机械稳定性提高。

公开(公告)号：US07895742B2

公开(公告)日：2011-03-01

申请号：US11872580

申请日：2007-10-15

申请人： Kyoung-Sei Choi ,  Sa-Yoon Kang ,  Yong-Hwan Kwon ,  Chung-Sun Lee

发明人： Kyoung-Sei Choi ,  Sa-Yoon Kang ,  Yong-Hwan Kwon ,  Chung-Sun Lee

IPC分类号： H01K3/22

CPC分类号： H05K3/28 ,  H05K1/036 ,  H05K1/0393 ,  H05K3/101 ,  H05K3/107 ,  H05K3/1258 ,  H05K2201/0129 ,  H05K2201/0162 ,  H05K2201/09036 ,  H05K2203/0108 ,  H05K2203/0759 ,  H05K2203/1105 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/4916

摘要： A method for manufacturing a tape wiring board in accordance with the present invention may employ an imprinting process in forming a wiring pattern thereby reducing the number of processes for manufacturing a tape wiring board and allowing the manufacturing process to proceed in a single production line. Therefore, the manufacturing time and cost may be reduced. A profile of the wiring pattern may be determined by the shape of an impression pattern of a mold. This may establish the top width of inner and outer leads and incorporate fine pad pitch. Although ILB and OLB process may use an NCP, connection reliability may be established due to the soft and elastic wiring pattern.

摘要翻译： 根据本发明的制造带布线板的方法可以在形成布线图案中采用压印工艺，从而减少制造带布线板的工艺的数量，并允许制造工艺在单个生产线中进行。 因此，制造时间和成本可能降低。 布线图案的轮廓可以通过模具的印模图案的形状来确定。 这可以建立内部和外部引线的顶部宽度并且结合细小的垫间距。 虽然ILB和OLB过程可能使用NCP，但是由于软和弹性布线图案可能建立连接可靠性。

公开(公告)号：US07315086B2

公开(公告)日：2008-01-01

申请号：US11181145

申请日：2005-07-13

申请人： Dong-Han Kim ,  Sa-Yoon Kang ,  Seok-Won Lee

发明人： Dong-Han Kim ,  Sa-Yoon Kang ,  Seok-Won Lee

IPC分类号： H01L23/42 ,  H01L23/58 ,  H01L23/14

CPC分类号： H01L23/49816 ,  H01L23/13 ,  H01L23/5384 ,  H01L24/45 ,  H01L24/48 ,  H01L24/81 ,  H01L24/90 ,  H01L2224/11334 ,  H01L2224/13144 ,  H01L2224/16237 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/81201 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/90 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/181 ,  H05K1/112 ,  H05K1/189 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2224/0401 ,  H01L2924/00012

摘要： A chip-on-board (COB) package has a flip chip assembly structure and is used for an integrated circuit (IC) card. The COB package has conductive patterns as contact terminals on an outer surface of a non-conductive film, and an IC chip on an inner surface of the film. The film has a number of holes through which the conductive patterns are partly exposed. A number of conductive bumps on an active surface of the IC chip face the inner surface of the film and enter corresponding holes in the non-conductive film to mechanically join and electrically couple to the conductive patterns. The disclosed COB package and a related manufacturing method allow a reduction in production cost, simplified process, better electrical connections, and improved reliability.

摘要翻译： 片上芯片（COB）封装具有倒装芯片组装结构，用于集成电路（IC）卡。 COB封装具有作为非导电膜的外表面上的接触端子的导电图案和膜的内表面上的IC芯片。 该膜具有多个孔，导电图案通过该孔部分露出。 IC芯片的有源表面上的多个导电凸块面向薄膜的内表面，并且在非导电薄膜中进入相应的孔以机械地连接并电耦合到导电图案。 所公开的COB封装和相关制造方法允许降低生产成本，简化工艺，更好的电连接和改进的可靠性。

公开(公告)号：US07190073B2

公开(公告)日：2007-03-13

申请号：US11158164

申请日：2005-06-20

申请人： Yong-Hwan Kwon ,  Sa-Yoon Kang ,  Chung-Sun Lee ,  Kyoung-Sei Choi

发明人： Yong-Hwan Kwon ,  Sa-Yoon Kang ,  Chung-Sun Lee ,  Kyoung-Sei Choi

IPC分类号： H01L23/48

CPC分类号： H01L24/32 ,  H01L21/563 ,  H01L23/49811 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/1147 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H05K3/0032 ,  H05K3/323 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/10674 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00014

摘要： A circuit film having film bumps is provided for a film package. An IC chip is mechanically joined and electrically coupled to the circuit film through the film bumps instead of conventional chip bumps. In a fabrication method, a base film is partially etched by a laser to create an etched area that defines raised portion relatively raised from the etched area. Then a circuit pattern is selectively formed on the base film, partly running over the raised portions. The raised portion and the overlying circuit pattern constitute the film bumps having a height not greater than the height of the circuit film.

摘要翻译： 为薄膜封装提供具有膜凸块的电路薄膜。 IC芯片通过膜凸块机械连接并电耦合到电路膜，而不是传统的芯片凸块。 在制造方法中，通过激光部分地蚀刻基底膜以产生限定从蚀刻区域相对升高的凸起部分的蚀刻区域。 然后，在基膜上选择性地形成电路图案，部分地在凸起部分上运行。 凸起部分和上覆电路图案构成具有不大于电路膜高度的高度的膜凸块。

公开(公告)号：US20060091504A1

公开(公告)日：2006-05-04

申请号：US11256650

申请日：2005-10-21

申请人： Un-Byoung Kang ,  Chung-Sun Lee ,  Sa-Yoon Kang ,  Yong-Hwan Kwon

发明人： Un-Byoung Kang ,  Chung-Sun Lee ,  Sa-Yoon Kang ,  Yong-Hwan Kwon

IPC分类号： H01L23/58

CPC分类号： H05K3/3463 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05572 ,  H01L2224/13144 ,  H01L2224/136 ,  H01L2224/16 ,  H01L2224/75 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75301 ,  H01L2224/8181 ,  H01L2224/81825 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/351 ,  H05K1/189 ,  H05K3/244 ,  H05K3/3436 ,  H05K3/3473 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

摘要： In one embodiment, a film circuit substrate comprises an insulating film made of polyimide resin; a conductive circuit pattern formed on the insulating film, the circuit pattern including an inner lead to be connected with a conductive bump of a semiconductor chip through a bump bonding process; and a tin-indium alloy layer formed on the inner lead to produce an inter-metallic compound layer of AuxSn composition during the bump bonding process.

摘要翻译： 在一个实施例中，薄膜电路基板包括由聚酰亚胺树脂制成的绝缘膜; 形成在所述绝缘膜上的导电电路图案，所述电路图案包括通过凸块接合工艺与半导体芯片的导电凸块连接的内部引线; 以及形成在内部引线上的锡铟合金层，以在凸点焊接工艺期间产生Au / Sn组分的金属间化合物层。

公开(公告)号：US20060012026A1

公开(公告)日：2006-01-19

申请号：US11173853

申请日：2005-06-30

申请人： Suk-Chae Kang ,  Sa-Yoon Kang ,  Dong-Han Kim ,  Si-Hoon Lee

发明人： Suk-Chae Kang ,  Sa-Yoon Kang ,  Dong-Han Kim ,  Si-Hoon Lee

IPC分类号： H01L23/48

CPC分类号： H01L23/50 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15312 ,  H01L2924/19041 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a metal plate in which one or more openings are formed, the metal plate mounting a semiconductor chip and a printed wire pattern substrate, e.g. a PCB, mounting one or more decoupling capacitors. The semiconductor chip is in direct contact with the metal plate to improve thermal characteristics, and the substrate is supported by the metal plate to increase mechanical stability of the package. The one or more openings in the metal plate accommodate the passing therethrough of plural pins electrically connected via the printed wire pattern substrate to the semiconductor chip. The semiconductor package can be usefully applied to a digital micro-mirror device (DMD) semiconductor package for use in a projection display device.

摘要翻译： 半导体封装包括其中形成有一个或多个开口的金属板，安装半导体芯片的金属板和印刷的线图案衬底，例如， PCB，安装一个或多个去耦电容器。 半导体芯片与金属板直接接触以改善热特性，并且基板由金属板支撑以增加封装的机械稳定性。 金属板中的一个或多个开口适应通过印刷的线图案基板电连接到半导体芯片的多个引脚的穿过。 半导体封装可以有用地应用于用于投影显示装置的数字微镜器件（DMD）半导体封装。