公开(公告)号：US09953997B2

公开(公告)日：2018-04-24

申请号：US15249590

申请日：2016-08-29

申请人： Joyoung Park ,  Hauk Han ,  Seok-Won Lee ,  Jeonggil Lee ,  Jinwoo Park ,  Kihyun Yoon ,  Hyunseok Lim ,  Jooyeon Ha

发明人： Joyoung Park ,  Hauk Han ,  Seok-Won Lee ,  Jeonggil Lee ,  Jinwoo Park ,  Kihyun Yoon ,  Hyunseok Lim ,  Jooyeon Ha

IPC分类号： H01L23/52 ,  H01L27/11582 ,  H01L27/1157 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L21/768

CPC分类号： H01L27/11582 ,  H01L21/76816 ,  H01L21/76865 ,  H01L21/76876 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53257 ,  H01L27/1157

摘要： Disclosed is a semiconductor memory device including stacks on a substrate, a vertical channel portion connected to the substrate through each of the stacks, and a separation pattern disposed between the stacks. Each of the stacks may include a plurality of gate electrodes stacked on the substrate and insulating patterns interposed between the gate electrodes. Each of the gate electrodes may include a first metal pattern, which is disposed between the insulating patterns to define a recess region recessed toward the vertical channel portion, and a second metal pattern disposed in the recess region. The first and second metal patterns may contain the same metallic material and may have mean grain sizes different from each other.

公开(公告)号：US20170062472A1

公开(公告)日：2017-03-02

申请号：US15249590

申请日：2016-08-29

申请人： Joyoung PARK ,  HAUK HAN ,  SEOK-WON LEE ,  JEONGGIL LEE ,  JINWOO PARK ,  KlHYUN YOON ,  HYUNSEOK LIM ,  JOOYEON HA

发明人： Joyoung PARK ,  HAUK HAN ,  SEOK-WON LEE ,  JEONGGIL LEE ,  JINWOO PARK ,  KlHYUN YOON ,  HYUNSEOK LIM ,  JOOYEON HA

IPC分类号： H01L27/115 ,  H01L21/768 ,  H01L23/532 ,  H01L23/522 ,  H01L23/528

CPC分类号： H01L27/11582 ,  H01L21/76816 ,  H01L21/76865 ,  H01L21/76876 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53257 ,  H01L27/1157

摘要： Disclosed is a semiconductor memory device including stacks on a substrate, a vertical channel portion connected to the substrate through each of the stacks, and a separation pattern disposed between the stacks. Each of the stacks may include a plurality of gate electrodes stacked on the substrate and insulating patterns interposed between the gate electrodes. Each of the gate electrodes may include a first metal pattern, which is disposed between the insulating patterns to define a recess region recessed toward the vertical channel portion, and a second metal pattern disposed in the recess region. The first and second metal patterns may contain the same metallic material and may have mean grain sizes different from each other.

摘要翻译： 公开了一种半导体存储器件，其包括在衬底上的堆叠，通过每个堆叠连接到衬底的垂直沟道部分以及布置在堆叠之间的分离图案。 每个堆叠可以包括堆叠在基板上的多个栅电极和插在栅电极之间的绝缘图案。 每个栅电极可以包括第一金属图案，其布置在绝缘图案之间以限定朝向垂直沟道部分凹陷的凹陷区域和设置在凹部区域中的第二金属图案。 第一和第二金属图案可以包含相同的金属材料，并且可以具有彼此不同的平均晶粒尺寸。

公开(公告)号：US20160099170A1

公开(公告)日：2016-04-07

申请号：US14943532

申请日：2015-11-17

申请人： Dongseog EUN ,  Young-Ho LEE ,  Joonhee LEE ,  Seok-won LEE ,  Yoocheol SHIN

发明人： Dongseog EUN ,  Young-Ho LEE ,  Joonhee LEE ,  Seok-won LEE ,  Yoocheol SHIN

IPC分类号： H01L21/768 ,  H01L27/24 ,  H01L21/3213 ,  H01L27/115 ,  H01L21/311

CPC分类号： H01L23/498 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/441 ,  H01L21/76805 ,  H01L21/76877 ,  H01L23/49844 ,  H01L23/5226 ,  H01L27/11548 ,  H01L27/11551 ,  H01L27/1157 ,  H01L27/11575 ,  H01L27/11578 ,  H01L27/11582 ,  H01L27/2481 ,  H01L2924/0002 ,  H01L2924/0001 ,  H01L2924/00

摘要： Provided are methods of forming a stack of electrodes and three-dimensional semiconductor devices fabricated thereby. The device may include electrodes sequentially stacked on a substrate to constitute an electrode structure. each of the electrodes may include a connection portion protruding horizontally and outward from a sidewall of one of the electrodes located thereon and an aligned portion having a sidewall coplanar with that of one of the electrodes located thereon or thereunder. Here, at least two of the electrodes provided vertically adjacent to each other may be provided in such a way that the aligned portions thereof have sidewalls that are substantially aligned to be coplanar with each other.

摘要翻译： 提供了形成由此制造的电极堆叠和三维半导体器件的方法。 该装置可以包括依次层叠在基板上以构成电极结构的电极。 每个电极可以包括从位于其上的一个电极的侧壁水平和向外突出的连接部分和具有与位于其上的电极之一的侧壁共面的对准部分。 这里，彼此垂直相邻设置的电极中的至少两个可以以这样的方式设置，使得其对准的部分具有基本上对准以彼此共面的侧壁。

公开(公告)号：US08473263B2

公开(公告)日：2013-06-25

申请号：US12351808

申请日：2009-01-09

申请人： William J. Tolone ,  Elwood Wray Johnson ,  Kyle Joseph Thieman ,  David Wilson ,  Marc Thomas Calello ,  Wei-ning Xiang ,  Andrew Marcellus Stogner ,  Seok-Won Lee ,  Michael Russel

发明人： William J. Tolone ,  Elwood Wray Johnson ,  Kyle Joseph Thieman ,  David Wilson ,  Marc Thomas Calello ,  Wei-ning Xiang ,  Andrew Marcellus Stogner ,  Seok-Won Lee ,  Michael Russel

IPC分类号： G06F17/50 ,  G06F9/455

CPC分类号： G06Q10/10 ,  G06Q10/06

摘要： A system for simulating interdependencies between multiple critical physical infrastructure models includes a first infrastructure data model that models a first physical infrastructure; a second infrastructure data model that models a second physical infrastructure, wherein the second physical infrastructure is a different physical infrastructure from the first physical infrastructure; a simulation engine adapted to automatically produce a change in the second infrastructure data model in response to a change in the first infrastructure data model; a user interface permitting a user to interact with the simulation engine; wherein the user interface and the simulation engine are configured such that the user can disable an element of the first physical infrastructure, and subsequently re-enable the element of the first physical infrastructure; wherein the first infrastructure data model comprises a transport network; and wherein the second infrastructure data model comprises a channel network.

摘要翻译： 用于模拟多个关键物理基础设施模型之间的相互依赖性的系统包括对第一物理基础设施建模的第一基础设施数据模型; 第二基础设施数据模型，其建模第二物理基础设施，其中所述第二物理基础设施是与所述第一物理基础设施不同的物理基础设施; 适于响应于第一基础设施数据模型的变化而自动产生第二基础设施数据模型的变化的模拟引擎; 允许用户与模拟引擎交互的用户界面; 其中所述用户界面和所述模拟引擎被配置为使得所述用户可以禁用所述第一物理基础设施的元素，并且随后重新启用所述第一物理基础设施的元素; 其中所述第一基础设施数据模型包括传输网络; 并且其中所述第二基础设施数据模型包括信道网络。

公开(公告)号：US07602769B2

公开(公告)日：2009-10-13

申请号：US10283074

申请日：2002-10-30

申请人： Seok Won Lee

发明人： Seok Won Lee

IPC分类号： H04L12/66

CPC分类号： H04L29/06027 ,  H04L47/2416 ,  H04L47/263 ,  H04L47/30 ,  H04L65/607 ,  H04L65/608

摘要： The present invention relates to an IP based or network based audio packet switching system, and more specifically to an audio packet switching system for integrating each independent module into a single interface for consistent control and data flow. Independent modules, such as a RTP/RTCP, encoder/decoder and mixer, are interworked with reception and transmission buffers to make a system more flexible. Additionally, audio data paths inside the switch are controlled through an audio packet router. The multi protocol system employing the RTP provides a single RTP control interface for transmitting and receiving audio packets to completely manage the system totally and raises a degree of resource utilization of the system by making it easy to implement additional functions to the RTP and coder through the buffers.

摘要翻译： 本发明涉及一种基于IP或网络的音频分组交换系统，更具体地说，涉及用于将每个独立模块集成到单个接口中用于一致控制和数据流的音频分组交换系统。 诸如RTP / RTCP，编码器/解码器和混频器之类的独立模块与接收和传输缓冲器互通，使得系统更加灵活。 此外，交换机内部的音频数据路径通过音频分组路由器进行控制。 采用RTP的多协议系统提供单一RTP控制接口，用于发送和接收音频数据包，以完全管理系统，并通过使RTP和编码器轻松实现附加功能，提高系统的资源利用程度 缓冲区

公开(公告)号：US07484901B2

公开(公告)日：2009-02-03

申请号：US11177451

申请日：2005-07-07

申请人： Byoung-Rim Seo ,  Jae-Cheon Doh ,  Yung-Cheol Kong ,  Seok-Won Lee

发明人： Byoung-Rim Seo ,  Jae-Cheon Doh ,  Yung-Cheol Kong ,  Seok-Won Lee

IPC分类号： G03B17/00

CPC分类号： H04N5/2254

摘要： The invention involves an image sensor camera module and a method of fabricating the image sensor camera module. The image sensor camera module uses a single-body type lens holder defined by a hollow cylindrical body having a shoulder protruding radially inwardly from an inner surface thereof. First and second lenses therein are spaced apart by a first spacer and a filter therein is spaced from the second lens by a second spacer. An image sensor is adhered to a lower rim of the body, and the filter is adhered to an upper rim thereof. All optical elements within the lens holder thus are affixed in fixed relative position compatible with a predefined focal length and axis. Moreover, the adhesively sealed interior of the body of the image sensor camera module prevents particulate contamination.

摘要翻译： 本发明涉及图像传感器相机模块和制造图像传感器相机模块的方法。 图像传感器相机模块使用由具有从其内表面径向向内突出的肩部的中空圆柱体限定的单体型透镜架。 其中的第一和第二透镜由第一间隔件间隔开，并且其中的过滤器通过第二间隔件与第二透镜间隔开。 图像传感器粘附到主体的下边缘，并且过滤器粘附到其上边缘。 透镜架内的所有光学元件因此固定在与预定焦距和轴线相容的固定相对位置。 此外，图像传感器相机模块的主体的粘性密封的内部可以防止颗粒污染。

公开(公告)号：US20080111938A1

公开(公告)日：2008-05-15

申请号：US11972735

申请日：2008-01-11

申请人： Jong-Dae PARK ,  Seok-Won LEE ,  Tae-Jin LEE

发明人： Jong-Dae PARK ,  Seok-Won LEE ,  Tae-Jin LEE

IPC分类号： G02F1/1333 ,  G09G3/36

CPC分类号： G02F1/133308 ,  G02F2001/133311 ,  G02F2001/133317 ,  G02F2201/465

摘要： A supporting unit includes a first support frame, a second support frame and an impurity barrier. The first support frame supports an LCD panel, and includes an opening through which a light is supplied to the LCD panel. The second support frame is protruded from sides of the first support frame to surround sides of the LCD panel. The impurity barrier is disposed on a surface of the first support frame corresponding to the liquid crystal display panel to prevent an inflow of impurities into a space between the first support frame and the liquid crystal display panel. Therefore, the supporting unit for the LCD panel includes the impurity barrier to prevent the inflow of the impurities that is externally provided into the space between the supporting unit and the LCD panel, thereby improving image display quality.

摘要翻译： 支撑单元包括第一支撑框架，第二支撑框架和杂质屏障。 第一支撑框架支撑LCD面板，并且包括一个开口，通过该开口将光提供给LCD面板。 第二支撑框架从第一支撑框架的侧面突出以围绕LCD面板的侧面。 杂质阻挡层设置在与液晶显示面板对应的第一支撑框架的表面上，以防止杂质流入第一支撑框架和液晶显示面板之间的空间。 因此，用于LCD面板的支撑单元包括杂质阻挡层，以防止外部设置在支撑单元和LCD面板之间的空间中的杂质的流入，从而提高图像显示质量。

公开(公告)号：US20080079861A1

公开(公告)日：2008-04-03

申请号：US11763688

申请日：2007-06-15

申请人： Jeong-min Seo ,  Seok-won Lee

发明人： Jeong-min Seo ,  Seok-won Lee

IPC分类号： G02F1/1333

CPC分类号： G02F1/133608 ,  G02F2201/46 ,  G06F1/1601

摘要： A liquid crystal display device includes a liquid crystal display panel, a backlight unit that is located at a rear of the liquid crystal display panel, a housing member that accommodates the backlight unit and includes a through hole, a flexible member that covers the through hole and includes an incision part, and a combining member that is combined with the through hole.A liquid crystal display (LCD) device, in accordance with embodiments of the present invention, reduces contamination due to alien substances.

摘要翻译： 一种液晶显示装置，包括液晶显示面板，位于液晶显示面板后方的背光单元，容纳背光单元并包括通孔的外壳构件，覆盖通孔的柔性构件 并且包括切口部分和与通孔组合的组合部件。 根据本发明的实施例的液晶显示器（LCD）装置减少了由外来物质引起的污染。

公开(公告)号：US20070015338A1

公开(公告)日：2007-01-18

申请号：US11487484

申请日：2006-07-17

申请人： Seok-Won Lee ,  Kyoung-Sei Choi ,  Dong-Han Kim ,  Young-Hoon Ro

发明人： Seok-Won Lee ,  Kyoung-Sei Choi ,  Dong-Han Kim ,  Young-Hoon Ro

IPC分类号： H01L21/76

CPC分类号： H01L23/49855 ,  H01L21/563 ,  H01L23/3121 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/90 ,  H01L2221/68377 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/484 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/83192 ,  H01L2224/83385 ,  H01L2224/85399 ,  H01L2224/90 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/181 ,  H05K3/244 ,  H05K3/4084 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2203/049 ,  H05K2203/1189 ,  H05K2203/1461 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/00

摘要： A substrate, a smart card module having the substrate and methods for fabricating the same are provided. A substrate having metal patterns formed on both sides and applicable to both wire bonding and flip chip bonding, a smart card module having the same and methods of fabricating the same are also provided. The substrate may include an insulating layer, an upper metal pattern, a bottom metal pattern, a first plating layer, a second plating layer and a substrate. The insulating layer may have a plurality of via holes. The upper metal pattern may be formed on the insulating layer and side surfaces of the plurality of via holes. The bottom metal pattern may be formed on the bottom of the insulating layer and electrically connected to the upper metal pattern. The first plating layer may be formed on the upper metal pattern and the upper surface of the bottom metal pattern. The second plating layer may be formed on the bottom of the bottom metal pattern. The substrate may include contact holes having side surfaces of the plurality of via holes covered by the upper metal pattern and the first plating layer. The bottom surface of the insulating layer may be supported by the bottom metal pattern and the first plating layer.

摘要翻译： 提供基板，具有基板的智能卡模块及其制造方法。 还提供了一种具有形成在两面上并且适用于引线接合和倒装芯片接合的金属图案的基板，具有该金属图案的智能卡模块及其制造方法。 基板可以包括绝缘层，上金属图案，底金属图案，第一镀层，第二镀层和基板。 绝缘层可以具有多个通孔。 上部金属图案可以形成在多个通孔的绝缘层和侧表面上。 底部金属图案可以形成在绝缘层的底部并且电连接到上部金属图案。 第一镀层可以形成在上金属图案和底部金属图案的上表面上。 第二镀层可以形成在底部金属图案的底部上。 基板可以包括具有由上金属图案和第一镀层覆盖的多个通孔的侧表面的接触孔。 绝缘层的底面可以由底部金属图案和第一镀层支撑。

公开(公告)号：US07077554B2

公开(公告)日：2006-07-18

申请号：US10631615

申请日：2003-07-31

申请人： Dong-Hoon Kim ,  Jong-Dae Park ,  Kyu-Seok Kim ,  Jeong-Hwan Lee ,  Jae-Ho Jung ,  Byung-Woong Han ,  Min-Gyu Kim ,  Hyoung-Joo Kim ,  Tae-Jin Lee ,  Seok-Won Lee ,  Sang-Hoon Lee

发明人： Dong-Hoon Kim ,  Jong-Dae Park ,  Kyu-Seok Kim ,  Jeong-Hwan Lee ,  Jae-Ho Jung ,  Byung-Woong Han ,  Min-Gyu Kim ,  Hyoung-Joo Kim ,  Tae-Jin Lee ,  Seok-Won Lee ,  Sang-Hoon Lee

IPC分类号： G02F1/1335 ,  F21V7/04

CPC分类号： G02B6/0021 ,  G02B6/0031 ,  G02B6/0068

摘要： A light guide plate includes a first surface having a light incident surface and a light reflect surface, a second surface facing the first surface, through which the reflected light exits, a first edge surface connected between edges of the light reflect surface and the second surface, and a second edge surface connected between edges of the light incident surface and the second surface, being opposite to the first edge surface. A light source is disposed on the light incident surface. A light guide plate may also include a stepped edge portion formed at a marginal area of the light guide plate on which a light source is combined. The stepped edge portion includes a light incident surface, a light reflect surface, an upper surface through which the reflected light exits the light guide plate, and a first edge surface connected between edges of the light reflect surface and the upper surface, being opposite to the stepped edge portion. A backlight assembly includes the light guide plate, a lamp unit including lamps and a lamp reflector that are disposed on the light incident surface, and a mold frame for receiving the stepped edge portion and the lamp unit.